2020 Storage Developer Conference Speakers

Marc Acosta

Marc Acosta

Research Fellow, Western Digital Corporation

Biography

Marc started his career at Western Digital in 1983 and went on to develop controllers for Western Digital's Enterprise and Client HDDs until 2000. Marc then joined Aristos Logic, a RAID Storage Processor startup, as VP of technical marketing. In 2007 Marc took a 2 1/2 year sabbatical, with a year spent at sea. In 2010 Marc rejoined the workforce at STEC, the pioneers of the Enterprise SSD, and was CTO when STEC was acquired by Western Digital in 2013. Marc has remained at Western Digital and works as a Research Fellow with a focus on data placement and computational storage technologies.


Richelle Ahlvers

Richelle Ahlvers

Board of Directors, SNIA; Storage Management Software Architect, Broadcom, SNIA; Broadcom Inc.

Biography

Richelle Ahlvers is Storage Management Software Architect at Broadcom Inc., where she defines storage management integrations, solutions, and standards strategies for the Data Center Storage Group and on the SNIA Board of Directors.

Richelle has spent over 25 years in Enterprise Storage R&D teams in a variety of technical roles, leading the architecture, design and development of storage array software, storage management software user experience projects including mobility, developing new storage industry categories including SAN management, storage grid and cloud, and storage technology portfolio solutions.

Richelle has been engaged with industry standards initiatives with SNIA and DMTF for many years. She served as the SNIA Technical Council Chair and has been engaged across a breadth of technologies ranging from storage management, to solid state storage, cloud, and green storage. She is on the SNIA Board of Directors and leads the SSM Technical Work Group developing the Swordfish Scalable Storage Management API.


Rajalaxmi Angandi

Rajalaxmi Angadi

Senior Software Developer, Intel Corporation

Biography

 


Matias Bjorling

Matias Bjørling

Director, Emerging System Architectures, Western Digital

Biography

Matias Bjørling, Ph.D., is a Director of Emerging System Architectures at Western Digital. He and his team are responsible for building next-generation storage architectures for deployment in large-scale public and private clouds. He has the pleasure of being the chair of the NVMe Zoned Namespaces Task Group, which standardizes the Zoned Namespace Command Set. Previously, Matias founded the Open-Channel SSD software eco-system, authored the Open-Channel 1.2 and 2.0 specifications, and developed the Linux kernel Open-Channel SSD subsystem, which today he continues to be the kernel maintainer. Matias holds a Ph.D. from the IT University of Copenhagen, where his thesis planted the seed for Open-Channel SSDs architecture having significant adoption in the industry.


Olga Buchonina

Olga Buchonina

CEO, ActionSpot

Biography

Olga Buchonina is an experienced executive leader, engineer, and manager in the technology industry. She founded ActionSpot with the vision to build an environment for entrepreneurs focused on Data Science, Data Security, and Data Engineering for blockchain technology. She has presented on blockchain at several conferences including BlockChain Developer Conference and Block World. She has over 20 years of professional experience and holds several patents. She earned an MS in computer engineering from the University of Houston and has worked for Viavi Solutions, Teledyne LeCroy, AMCC, and IBM.


Mark Carlson

Mark Carlson

Principle Architect, Kioxia

Biography

Mark A. Carlson, Principal Engineer, Industry Standards at Kioxia, has more than 35 years of experience with Networking and Storage development and more than 20 years experience with Java technology. Mark was one of the authors of the CDMI Cloud Storage standard. He has spoken at numerous industry forums and events. He is the co-chair of the SNIA Cloud Storage and Object Drive technical working groups, and serves as co-chair of the SNIA Technical Council.


Anjaneya Chagam

Anjaneya Chagam

Cloud Architect, Intel Corporation

Biography

Anjaneya “Reddy” Chagam is a Senior Principal Engineer and Lead Cloud Storage Architect in Intel’s Cloud and Enterprise Solutions Group. He is responsible for developing software-defined storage strategy, architecture, and technology initiatives. He is a board member in Ceph and SODA Linux Foundation projects. He was instrumental in initiating and gaining consensus among storage vendors to launch SODA (former name OpenSDS) Linux Foundation project. He leads flash manageability architecture, development efforts in SODA Linux Foundation project. He is a Chief Architect responsible for delivering software optimizations in Ceph via Intel upstream contributions. He is a regular speaker at major industry conferences, including Storage Developer Conference, OpenStack, CloudNativeCon and Red Hat Summit, has published several white papers on flash-optimized storage solutions. He earned an MS in computer science from Arizona State University.


He Chu

He Chu

Engineer, GENG YUN TECHNOLOGY PTE. LTD.

Biography

I am a software engineer interested on Flash file system, SSD firmware and storage system. I am trying to introduce concepts and practices of continuous integration, Agile development, and software-defined storage to SSD firmware developing and testing. The pynvme, an open-source project based on SPDK NVMe driver, is one of his efforts to improve SSD developing efficiency and quality.


Thomas Coughlin

Thomas Coughlin

President, Coughlin Associates

Biography

Thomas Coughlin, PhD, the founder of Coughlin Associates has over 35 years of digital storage engineering and engineering management experience. Coughlin Associates provides digital storage and market consulting, reports and conferences on digital storage and applications.


Sudheer Dantuluri

Sudheer Dantuluri

Software Engineer, Microsoft

Biography

Sudheer is a software developer working in the Microsoft SMB team since 2018. He is responsible for development efforts in supporting SMB over QUIC. He earned a Masters in Computer Science from Texas A&M University, College Station in 2017.


Don Deel

Don Deel

SMI GB Chair, SNIA; Senior Standards Technologist, NetApp, SNIA; NetApp

Biography

Don Deel is a Senior Standards Technologist at NetApp and has been actively involved with the Storage Networking Industry Association in several different volunteer roles since the year 2000. He participated in the development of the original Bluefin specification which later became SMI-S when it was contributed to the SNIA, and he continues to play an active role in the ongoing development of SMI-S today. He is also currently involved in the development of the SNIA Swordfish specification, which handles the management of storage and servers in hyperscale and cloud infrastructure environments. His standards development experience stretches back into the mid-1980s, and includes work on the Fibre Channel and HIPPI standards.

Within the SNIA, Don has been active in a number of leadership positions since the early days of the association, and he has been recognized for his contributions several times. He is currently serving as the Storage Management Initiative Governing Board chair, the SMI Technical Work Group chair, and the Scalable Storage Management Technical Work Group co-chair.


Douglas Dumitru

Douglas Dumitru

CTO, EasyCo LLC

Biography

CTO at EasyCo LLC. Developer of Block Translation Software for All Flash Arrays including five patent grants.


Brian Eccles

Brian Eccles

Principal Analyst, IBM

Biography

Brian is an IBM Quantum Ambassador and analyst. His experience includes market research, technology prognostication, key account management, business development and sales, teaching continuing education courses, new product development, building manufacturing facilities, and controlling a low earth orbit satellite. He enjoys building and leading global teams.


Lars Eggert

Lars Eggert

Technical Director, NetApp

Biography

Lars Eggert is Technical Director for Networking in NetApp’s Office of the CTO based near Helsinki, Finland.

Lars is an experienced technologist with deep expertise in network architectures, systems and protocol design, ranging from the Internet to datacenter to IoT/edge environments. He drives NetApp’s networking agenda by bridging the gap between academic research and products through various collaborative research, engineering and open source collaborations, which lead to product improvements, key IPR, open source, directions for strategic investments and numerous academic papers and standards contributions.

Lars has been leading networking standardization as part of the IETF steering group and architecture board for two decades and has chaired its research arm, the IRTF. He currently chairs the QUIC working group that is delivering a major new Internet protocol, and he serves on the program and organization committees of academic conferences such as ACM SIGCOMM, as well as numerous other boards.

Lars received his Ph.D. in Computer Science from the University of Southern California (USC) in 2003. Before joining NetApp in 2011, he was a Principal Scientist at Nokia and served on the corporation’s CTO and CEO Technology Councils of senior technology experts. In parallel, from 2009-2014, Lars was an Adjunct Professor at Aalto University, Finland’s top technical university. From 2003-2006, he was a senior researcher at NEC Labs.


Charles Fan

Charles Fan

CEO and co-founder, MemVerge

Biography

Charles Fan is the co-founder and CEO of MemVerge, the inventor of software that delivers the memory-centric infrastructure (MCI) of the future, today. Prior to MemVerge, Charles was CTO of Cheetah Mobile, leading its technology teams in AI, big data and cloud. Before Cheetah, Charles was an SVP/GM at VMware, responsible for VMware’s storage and availability business unit. He led the team that built the HCI market leader Virtual SAN. Charles also worked at EMC and was the founder of EMC China R&D Center, having joined EMC via the acquisition of Rainfinity. He was a co-founder and CTO of Rainfinity and was responsible for its file virtualization and high availability products. Charles received his Ph.D. and M.S. in Electrical Engineering from the California Institute of Technology, and his B.E. in Electrical Engineering from The Cooper Union.


Ron Feist

Ron Feist

Subject Matter Expert Elite for Hybrid Cloud, NetApp

Biography

Former Professional Services Consultant and Cloud Architect, I added the DevOps and Cloud expertise to my Swiss knife since I joined NetApp University, leading the enablement for our Professional Services and our Channel Partners on the new concepts surrounding the infrastructure world in the modern data center of today and tomorrow. I love presenting and teaching everything I learn!


Steven French

Steven French

Principal Software Engineer, Microsoft

Biography

Steve French is a Principal Software Engineer for Microsoft Azure Storage, and the original author and maintainer of the Linux cifs/smb3 client, and a member of the Samba team, and former chair of the SNIA CIFS Working Group, and is a frequent speaker at Linux and Storage events.


Shobha G

Shobha G

Parallel Machine Learning Algorithms on distributed Platform, R V College of Engineering

Biography

Shobha G, Professor, Computer Science and Engineering Department, RV College of Engineering have teaching experience of 25 years, her specialization includes data mining, Machine Learning and Image processing. She has published more than 150 papers in reputed journals / conferences. She has also executed sponsored projects worth INR 200 lakhs from various agencies Nationally and Internationally. She is a recipient of various awards such as Career Award for young teachers, 2007-08 constituted by All India Council of Technical Education, Best Researcher award from Cognizant 2017, GHC Faculty Scholar for Women in Computing in 2018 and IBM Shared University Research Award in 2019.


Rémy Gauguey

Rémy Gauguey

Sr Software Architect - Data Center Business Unit, Kalray

Biography

Rémy Gaugey is a Senior Software Architect at Kalray, for the Data Center Business Unit. He develops advanced architectures for composable infrastructure, leveraging the MPPA manycore technology from Kalray. Rémy has been previously developing his expertise at Connexant, Mindspeed Technologies and the CEA labs. He holds several patents in the fields of software architecture and packet processing.


Jerome Gaysse

Jerome Gaysse

Senior Technology and Market Analyst, silinnov consulting

Biography

Jerome Gaysse is senior technology and market analyst at Silinnov Consulting, a consultancy based on emerging data storage technologies. He also drives the Cloud services offering at SPIE ICS, a leading IT French company.

He has strong technical expertise in IP, NVM, FPGAs, and ASICs for the data center market. He successfully worked with major corporate companies, startups, and research institutes in both Europe and the USA. He is a regular presenter at international conferences such as those sponsored by IEEE and SNIA, as well as past Flash Memory Summits. Jerome earned an MSEE from the National Institute of Applied Sciences (INSA) in Lyon (France) with a semiconductor specialty.


Bill Gervasi

Bill Gervasi

Principal Systems Architect, Nantero

Biography

Mr. Gervasi has over 40 years of experience in high speed memory subsystem definition, design, and product development. Career highlights include 19 years at Intel where he was systems hardware designer, software designer, and strategic accounts manager. Mr. Gervasi subsequently was with S3 where he was a graphics architecture specialist and at Transmeta as memory technology analyst. Most recently he held several key positions with companies such as Netlist, SimpleTech, and US Modular driving unique memory module configurations. He is now Principal Systems Architect for Nantero, developing non-volatile RAM-class memories.

Mr. Gervasi been involved in the definition of Double Data Rate SDRAM since its earliest inception. He has served on the JEDEC Board of Directors and chaired committees for DRAM parametrics and small form factor memory modules during the development of DDR1 through DDR5. He is currently the chairman of the JEDEC Non-Volatile Memory committee.


Jody Glider

Jody Glider

Principal Storage Architect, Cloud Architecture and Engineering, SAP

Biography

Jody is a 40+ year veteran of enterprise storage system research and development. Early in his career he worked on mainframe storage systems, was a leader in startup SF2 Corporation which brought to market one of the first fault-tolerant RAID controllers, was responsible for firmware for IBM's first mainframe-attached RAID controller, and then worked in IBM Almaden Research in storage systems research in a large range of projects related to log-structured storage, distributed and scale-out storage, compression and deduplication, and preserving ability to leverage data reduction capabilities in the face of at-source encryption. Most recently Jody has worked in SAP's Global Cloud Services business leading its storage architecture group.


Akhil Gokhale

Akhil Gokhale

Managing Consultant, Wipro Technologies

Biography

Akhil has around 18 years of experience in product and software development. He is currently part of the Cloud and Software Products Practice.


Javier Gonzalez

Javier Gonzalez

Principal Software Engineer, Samsung Electronics

Biography

Javier is a Principal Software Engineer at Samsung Electronics, where he founded and manages SSDR (Samsung Semiconductor Denmark Research) - Samsung Memory first R&D center in Europe and fifth worldwide. He leads a distributed team of top engineers where he applies his expertise in open-source and ecosystem enablement for emerging storage technologies. He co-authored the Open-Channel SSD specification and currently contributes to the Zoned Namespace standardization and extended features in NVMe. He is a contributor to a range of open-source projects, including the Linux kernel, and a regular speaker at top storage industry conferences. He holds a Ph.D in Operating Systems by the IT University of Copenhagen.


Krishnakumar Gowravaram

Krishnakumar Gowravaram

Senior Technical Leader and Architect, Cisco

Biography

Experienced Technical leader, Software Engineer with a demonstrated history of building Storage & Networking systems.


Jim Handy

Jim Handy

General Director, Objective Analysis

Biography

Jim Handy of Objective Analysis has over 35 years in the electronics industry including 20 years as a leading semiconductor and SSD industry analyst. Early in his career he held marketing and design positions at leading semiconductor suppliers including Intel, National Semiconductor, and Infineon. A frequent presenter at trade shows, Mr. Handy is known for his technical depth, accurate forecasts, widespread industry presence and volume of publication. He has written hundreds of market reports, articles for trade journals, and white papers, and is frequently interviewed and quoted in the electronics trade press and other media. He posts blogs at www.TheMemoryGuy.com, and www.TheSSDguy.com.


Feilong He

Feilong He

Machine Learning Engineer, Intel Corporation

Biography

Feilong is a machine learning engineer at Intel Corporation currently. He has contributed a lot of code to Apache Hadoop project. And he is the major code developer for HDFS (Hadoop Distributed File System) persistent memory cache feature. Before joining Intel, Feilong earned a Master degree in Computer Science from Sun Yat-sen University, China.


Jeff Hilland

Jeff Hilland

President, DMTF; Distinguished Technologist at HPE, DMTF; HPE

Biography

Jeff Hilland is a Distinguished Technologist at Hewlett Packard Enterprise (HPE) in the CTO organization working on infrastructure management architecture with a focus on servers. Jeff served as VP of Technology for DMTF for 6 years before being appointed President of DMTF. Jeff has served in various leadership roles in DMTF since 2003, including chair of the Executive Committee, Technical Committee, Platform Subcommittee and co-chair of both the Server Management Work Group and the Desktop & Mobile Work Group. Jeff is one of the chief architects behind Redfish and contributed significantly to SMASH & DASH. Jeff also co-chairs the Security Task Force in PMCI. Jeff has spent the last 23 years driving industry standards and has also served in chairing roles in the Gen-Z Consortium, RDMA Consortium and the InfiniBand Trade Association.


Brandon Hoff

Brandon Hoff

Director, Product Management, Fibre Channel Industry Association, Broadcom Inc.

Biography

Brandon Hoff is a Principal Architect at Broadcom Inc.. Prior to Broadcom, Brandon was previously a part of Emulex’s Office of the CTO, VP of Marketing at San Juan Tech, CMO and CSO at CipherOptics, and Business Line Manager at McDATA. Brandon has 30 years of Engineering and Marketing experience in ASIC development, Software, Fiber Channel, Ethernet, Security, Encryption, Telco, and Flash. Brandon is responsible for keeping Broadcom Limited ECD in a leadership position in technologies, products, and markets. In addition, Brandon has two patents and has held leadership positions in trade groups such as IBTA and SNIA.


Klaus Jensen

Klaus Jensen

Staff Software Engineer, Samsung Electronics

Biography

Klaus Jensen is a Software Engineer with a background in academia. He has worked in the area of High Performance Computing, avoided users as an old school UNIX sysop, taken a stint in an IT consultancy, written a Ph.D. on tape and been involved in the OpenChannel SSD community. He now works on NVMe emulation and the NVMe software stack at Samsung Electronics.


Mahmoud Jibbe

Mahmoud Jibbe

Technical Director, NetApp

Biography

Technical director at NetApp since 2011. Dr. Jibbe has 32 Patents awarded and 58 papers published in different engineering areas. Dr. Jibbe is an adjunt faculty at the Wichita Sate University in the EECE department since 1983.


Shin'ichiro Kawasaki

Shin'ichiro Kawasaki

Principal Engineer, Western Digital Corporation

Biography

Shin'ichiro Kawasaki is a Principal Engineer in Western Digital Research System Software Group. Shin'ichiro has a long experience with embedded Java systems performance optimization as well as storage device firmware development. Zoned block device support and testing in Linux ecosystem are now Shin'ichiro's main interest.


Terence Kelly

Terence Kelly

Biography

Terence Kelly studied Computer Science at Princeton and the University of Michigan, earning his Ph.D. at the latter in 2002. He then spent 14 years at Hewlett-Packard Laboratories. During his final five years at HPL, he developed software support for non-volatile memory. Kelly now teaches and evangelizes the persistent memory style of programming. His patents and publications are listed at http://ai.eecs.umich.edu/~~tpkelly/papers/


Ramya Krishnamurthy

Ramya Krishnamurthy

QA Architect [Test Expert], HPE

Biography

Ramya Krishnamurthy- Have 17+ years’ of strong hands-on experience in the storage domain across companies like HPE, NetApp, EMC (Wipro/Mindtree)

Working as QA architect in HPE currently for HPE storage solution with 3PAR /Primera

Hold the below Certifications:

  • SNIA Certified Professional (SCP)
  • CCNA certified
  • Dell Certified in Networking

Was Backup speaker in last year SDC 2019


Ajay Kumar

Ajay Kumar

Senior Test Specialist, HPE

Biography

Ajay Kumar has almost 13 year of industry experience in server and storage domain currently at HPE. He is part of Ecossystem team to qualify latest Windows Server OS. Prior to that Ajay has worked with NetApp on Data Protection solution like Backup/Snapmirror/Snaplock/Snapvault.


Damien Le Moal

Damien Le Moal

Director, Western Digital Corporation

Biography

Damien Le Moal manages the System Software Group within Western Digital Research. Damien has over 20 years of experience in the area of system software, operating systems and storage software solutions. Damien is involved in research activities including block device management, file systems, distributed systems, solid state and emerging NVM technologies. He is a regular contributor to the Linux kernel (I/O stack, device mapper) and is a co-designer and maintainer of several open source projects and kernel components.


Volker Lendecke

Volker Lendecke

Developer, SerNet GmbH

Biography

Volker Lendecke is a long-time member of the Samba Team and co-founder of SerNet GmbH in Göttingen, Germany.


Yadong Li

Yadong Li

Lead software architect, Intel

Biography

Yadong Li is a Principal Engineer and the Lead Software Architect for high performance SmartNIC programs in the Networking Division at Intel.  Yadong’s ongoing focus is to develop and expand the Cloud Storage and SmartNIC software strategy, architecture and technologies.

Yadong joined Intel in 2001 as a software engineer in the LAN Access Division (LAD), leading network device driver design, performance optimization and SW/HW interface design contributions for several generations of Ethernet Controllers.  From 2012 through 2017, Yadong worked as a platform software architect for mobile SoCs with the MCG System Architecture Team, and later worked on Optane SSD architecture in Storage Technologies Group.  Yadong holds 9 patents granted on Ethernet Controller design and 8 pending.

Yadong earned two master’s degrees, one in Computer Science from Wright State University and one in Information and Signal Processing from Beijing University of Posts and Telecommunications.


Chris Lionetti

Chris Lionetti

Board of Directors, SNIA; Senior Technical Marketing Engineer, HPE

Biography

Chris Lionetti is a veteran of the storage industry who has been building complex systems and SANs for over 25 years. Chris has long been actively involved with the Storage Network Industry Association, SNIA. He is currently a reference architect on the HPE Nimble Storage team. Earlier in his career, he worked as an engineer for HP, Dell, Microsoft, and NetApp. Chris holds 9 patents on topics related to data centers, networking, and storage.


Nishant Lodha

Nishant Lodha

Director of Technologies, Marvell

Biography

Nishant Lodha is a Director of Technologies focused on emerging I/O for Marvell’s 10/25/50/100GbE Ethernet NICs and 16/32G Fibre Channel HBAs. Based in the San Francisco Bay Area, Nishant is responsible for Enterprise and Cloud Storage markets, trend analysis and analytics, technology integrations and use cases for flash accelerated applications. As an author of various papers and speaker at technology events – including a recently published NVMe-oF and 25GbE paper, speaker at several Flash Memory Summits, DPDK Summit, SDC and a various BrightTalk webinars. Over the last decade, Nishant has evangelized Ethernet and Fibre Channel based fabrics, AI/ML and Storage use cases and Telco/Cloud technologies. Prior of joining Marvell in 2010, Nishant has worked at various storage and networking industry majors including Hewlett Packard, Sun Microsystems and Intel. Nishant served on the Board of Directors for the Ethernet Alliance in 2016 and is on the board of the IBTA Steering committee.


Simon Lund

Simon Lund

Staff Engineer, Samsung

Biography

Simon Lund is a Staff Engineer at Samsung. His current work revolves around reducing the cognitive load for developers adopting emerging storage interfaces. Before Samsung, he worked at CNEX Labs designing and implementing liblightnvm: the Open-Channel SSD User Space Library. Simon received his Ph.D. on High Performance Backends for Array-Oriented Programming on Next-Generation Processing Units at the University of Copenhagen.

He has given several talks on programming language, interpreter, and compiler design for HPC during his Ph.D. Most recently, in the storage industry at the SNIA Storage Developer Conference 2019 and Linux Vault 2020. Regardless of the topic, Simon's focus is the same, to bridge the gap between high-level abstractions and low-level control and measuring the cost and benefit of doing so.


Chris Mao

Chris Mao

Principal Engineer, Pure Storage

Biography

Chris Mao is currently a Principal Engineer at Pure Storage. He has been driving hardware architecture, flash controller design and domain-specific hardware acceleration for Pure's scale-out FlashBlade Systems since its very early concept in 2014.

Prior to Pure, he co-architected and designed the very first networking ASIC for Google’s hyper-scale datacenter in 2012. At Nuova systems/Cisco, he co-architected and designed the industry’s first Converged Network Interface ASIC for server & network virtualization that launched Cisco’s UCS Systems in 2006. He received his PhD degree in Electrical & Computer Engineering from Carnegie Mellon University, and holds 18 US & International patents.


Jean-Francois Marie

Jean-Francois Marie

Chief Solution Architect, Kalray

Biography

I have more than 30 years of experience in the high tech industry.
I am Chief Solution Architect at Kalray for the Datacenter Business Unit.
I have started my career dealing with real time, then joined Sun Microsystems, where I spent most of my time handling data processing architectures.
Then I joined EMC² and finally NetApp in 2006, where I had various roles in a 13-years career.
I have been Chief Technologist EMEA, Product Marketing Director EMEA and French Expertise team manager to handle new technology introduction.
I have also managed global international accounts, regional ones, alliances and partners.
I have also been an active SNIA member for 10 years and French SNIA President for 2 years.
I am also a professional coach to help leaders and companies manage the transformation we are all in.
I have a master degree in Electronics, specialized in Microprocessor design and embedded systems.
I have been a Basket Ball player, a coach and head coach for 25 years.


William Martin

William Martin

SSD I/O Standards, Samsung

Biography

Bill Martin has over 30 years of experience in the storage industry. He is currently responsible for driving Solid State Storage forward within the industry for Samsung in a variety of standards arenas, e.g,. as Co-Chair of the SNIA Technical Council, Chair of the SCSI T10 Committee, NVMe board member, Author of the NVMe-KV Command Standard, Secretary of ATA T13 Committee, and editor of the SCSI T10 Block Commands document. He has also had extensive experience in the Fibre Channel arena including with the T11 Standards committee and leading FC interoperability events. His employers have included HP, Gadzoox, Brocade, Sierra Logic, Emulex and now Samsung. His industry work has been recognized with numerous awards from INCITS, the FCIA and the SNIA.


Takashi Menjo

Takashi Menjo

Researcher, Nippon Telegraph and Telephone Corporation

Biography

Takashi Menjo is a Researcher at NTT Software Innovation Center located in Tokyo, Japan. He works in the area of PMEM-aware applications, especially redesigning traditional disk-based softwares such as PostgreSQL.


Rupin Mohan

Rupin Mohan

Director R&D, CTO SAN, HPE

Biography

Rupin Mohan is a Director of Research & Development and CTO of Storage Networking (SAN) at HPE Storage. Rupin leads a global R&D team responsible for development of Storage Networking products. Rupin has filed 30+ patents, at HPE. Rupin has 25+ years’ experience in Storage Networking stack development and has been instrumental in picking significant technology & business trends, technical evaluation, and analysis of new technologies in Storage Networking. He is a Board Member and Marketing Chairman for FCIA. Rupin completed his MBA from MIT Sloan School of Management as a Sloan Fellow. He also holds a MS in Engineering from Tufts University and BE in Computer. Engineering from Delhi Institute of Technology.


Hani Nemati

Hani Nemati

Software Engineer, Microsoft

Biography

Hani Nemati is a Software Engineer at Microsoft. He works with Kernel (Windows and Linux) teams as system performance engineer. Prior to this, he was a PhD student in the DORSAL Lab at Polytechnique Montreal where he worked on Linux tracing and Virtualization technology.


Jim Pappas

Jim Pappas

Chairman, CXL Consortium; Director of Technology Initiatives, Intel, CXL Consortium

Biography

Jim Pappas is the Director of Technology Initiatives at Intel Corporation. In this role, Jim is responsible to establish broad industry ecosystems that comply with new technologies in the areas of Enterprise I/O, Energy Efficient Computing, Solid State Storage, and Persistent Memory. Jim has founded or has served on several organizations in these areas including PCI-SIG, Universal Serial Bus (USB), Storage Networking Industry Association (SNIA), InfiniBand Trade Association (IBTA), Open Fabrics Alliance (OFA), The Green Grid (TGG), Compute Express Link™ (CXL), and many others. Jim has over 30 years of experience in the computer industry. He has been granted eight U.S. patents in the areas of computer graphics and microprocessor technologies. He has spoken at dozens of major industry events and holds a B.S.E.E. from the University of Massachusetts, Amherst, Massachusetts.


Joey Parnell

Joey Parnell

Sr. Architect, NetApp

Biography

Joey Parnell is a software architect and development lead at NetApp in the E-Series product group, responsible for reliability and availability features including SCSI and NVMe-oF support, storage virtualization, active-active I/O support, automatic load balancing, and data security features. Recently his focus has been technical leadership on video surveillance solutions. Prior to NetApp, he was a development lead and software developer at LSI Corporation, responsible for serviceability and diagnostics features of RAID disk array subsystems. He graduated from Wichita State University with BS and MS degrees in Computer Science.


Garrett Ransom

Garrett Ransom

Scientist, Los Alamos National Laboratory

Biography

Garrett Ransom is a storage administrator and developer in the HPC Systems group at Los Alamos National Laboratory. He is responsible for the design, deployment, and management of long-term storage infrastructure to support the Laboratory's extensive scientific HPC capabilities. Garrett received a bachelor's in Computer Science from New Mexico Tech in 2016. Over the last 3 years at the Laboratory, he has contributed to the development of MarFS, Pftool, Marchive, and GUFI. Additionally, Garrett has overseen the deployment of production Campaign Storage systems and provides administrative support for MarFS, GPFS, and HPSS filesystems across the site.


Hannes Reinecke

Hannes Reinecke

Kernel Storage Architect, SUSE Software Solutions

Biography

Studied Physics with main focus image processing in Heidelberg from 1990 until 1997, followed by a PhD in Edinburgh 's Heriot-Watt University in 2000. Worked as sysadmin during the studies, mainly in the Mathematical Institute in Heidelberg. After working as a teamlead at SUSE Labs for storage and networking I've switched roles to become the Kernel Storage Architect at SUSE Labs, concentrating on developing new technologies and integrating upstream implementations into SUSE Linux. Principal contact point for storage and network related issues on SLES.

Linux addict since the earliest days (0.95); various patches to get Linux up and running. Main points of interest are storage, (i)SCSI, FC/FCoE, NVMe-OF, and multipathing. And S/390, naturally.

I'm active on the Linux SCSI mailing list, reviewing patches and dusting out murky corners in the SCSI stack. Recently got involved in the NVMe effort, working together with partners like NetApp, Broadcom, and Marvell to get NVMe-oF to production quality.


Thomas Rivera

Thomas Rivera

Strategic Success Manager, VMware Carbon Black

Biography

 


Andy Rudoff

Andy Rudoff

Persistent Memory SW Architect, Intel

Biography

Andy Rudoff is a Senior Principal Engineer at Intel Corporation, focusing on Non-Volatile Memory programming. He is a contributor to the SNIA NVM Programming Technical Work Group and the CXL Memory Systems Workgroup which defined the extensions required for the configuration of Persistent Memory on CXL.


Josh Salomon

Josh Salomon

Senior Principal Software Engineer, Red Hat

Biography

Josh has almost 30 years of experience in software development, more than 15 years in architecture positions and 5 years of experience as an architect in the storage development industry (in ScaleIO and Red Hat).


Leah Schoeb

Leah Schoeb

Sr Developer Relations Manager, AMD

Biography

Leah Schoeb is a Sr. Developer Relations Manager at AMD focused on system-level platform architecture for AMD's storage ecosystem. She has over 25 years' experience in helping systems companies with performance engineering and optimization, market positioning, benchmark evidence creation, and guiding industry standards development for system, virtualization, containerized, and data solutions. She has served in leadership roles for performance architecture for a wide variety of major companies, including VMware, Sun Microsystems, Dell, Intel, and Amdahl. An active participant in standards work for the Storage Networking Industry Association (SNIA). She earned a BSEE from the University of Maryland and an MBA from the University of Phoenix. She is a member of the Flash Memory Summit’s Conference Advisory Board and the organizer of the Annual Update series of presentations.


Peter Scott

Peter Scott

Senior Engineer, Thales, Inc

Biography

I have worked in kernel mode development for over 25 years, focusing primarily on the Windows platforms. My main area of expertise is in the file system and storage stacks.


Scott Shadley

Scott Shadley

VP Marketing, NGD Systems

Biography

Scott Shadley is a member of the SNIA Board of Directors and VP Marketing at NGD Systems where he leads marketing, product management, and product development for the company’s industry-leading computational storage. He has been a key figure in promoting computational storage, being co-chair of the SNIA Technical Working Group on the subject which he helped found, and speaking on the subject at Open Compute Summit, Flash Memory Summit, multiple SDCs, and many other events, press interviews, blogs, and webinars. Before joining NGD Systems, Scott managed the Product Marketing team at Micron, was the Business Line Manager for the SATA SSD portfolio, and was the Principal Technologist for the SSD and emerging memory portfolio. He launched four successful innovative SSDs for Micron and two for STEC, all of which were multimillion dollar sellers. Scott earned a BSEE in Device Physics from Boise State University and an MBA in marketing from University of Phoenix.


Debendra  Das Sharma

Debendra Das Sharma

Intel Fellow; Director of I/O Technology and Standards Group, Intel

Biography

Dr. Debendra Das Sharma is an Intel Fellow and Director of I/O Technology and Standards Group. He is an expert in IO subsystem and interface architecture, delivering Intel-wide critical interconnect technologies in Peripheral Component Interconnect Express (PCIe), coherency, multichip package interconnect, SoC, and rack scale architecture. He is the Technical Task Force Co-chair of CXL™ Consortium and a board member of PCI-SIG.

Debendra joined Intel in 2001 from HP. He has a Ph.D. in Computer Engineering from the University of Massachusetts, Amherst and a Bachelor of Technology (Hons) degree in Computer Science and Engineering from the Indian Institute of Technology, Kharagpur. He holds 99 U.S. patents. Debendra currently lives in Saratoga, Calif. with his wife and two sons. He enjoys reading and participating in various outdoor and volunteering activities with his family.


Suchakrapani Sharma

Suchakrapani Sharma

Staff Scientist, ShiftLeft Inc

Biography

Suchakra is currently a Staff Scientist at ShiftLeft Inc. where he plays around with large graphs and hunts bugs. He completed his PhD in Computer Engineering from École Polytechnique de Montréal where he worked on eBPF and hardware-assisted tracing techniques to advance systems performance analysis. On related topics, he has delivered talks & trainings at meetups/conferences such as USENIX LISA, All Systems Go, Papers We Love, Tracing Summit etc. He also developed one of the first hardware-trace based VM analysis techniques.


Mehul Sheth

Mehul Sheth

Senior Performance Engineer, Druva Data Solutions Pvt. Ltd.

Biography

Mehul Sheth is a Senior Performance Engineer in Performance Labs at Druva where he is responsible for the performance of CloudApps product of Druva InSync and Filesystem / NAS solution of Druva Phoenix. He has a experience of about 14 years in development and performance engineering, where he has ensured production performance of thousands of applications. Mehul loves to tackle unsolved problems and strives to bring a simple solution to the table, rather than trying complex things.


Pradeep Sindhu

Pradeep Sindhu

Co-Founder & CEO Fungible

Biography

Pradeep Sindhu has been at the forefront of the network and processing industry for over three decades. As the co-founder and CTO of Juniper Networks, he played a central role in the architecture, design and development ofJuniper’s M40 router – the M series was the first of its kind, offering the industry true decoupling of the control plane and the forwarding plane. Prior to Juniper, he was aPrincipal Scientist and Distinguished Engineer at theComputer Science Lab at Xerox’s Palo Alto ResearchCenter (PARC) pushing the envelope on what silicon could do for networking and processing. He continues to innovate, explore and create advancements in this space at his new company, Fungible. He is passionate about new ways to support our growing data-centric world with the right combination of hardware and software to build the infrastructure our future needs.


Amarjit Singh

Amarjit Singh

Director, DevOps Solutions, Kioxia America

Biography

Amarjit Singh is the director of solutions engineering within the KumoScale™ Shared and Accelerated Storage Software team at KIOXIA America, Inc. (formerly Toshiba Memory America, Inc.). He is a hands-on private and public cloud enthusiast who leads DevOps and cloud solutions engineering within the team. He is currently working on expanding the capabilities of KumoScale software while also enabling NVMe flash ‘as a service’ in modern cloud infrastructures. Amarjit has managed large and massive infrastructures in both public clouds and data centers, and has spent the past 20 years helping to evolve cloud infrastructures. Mr Singh earned Bachelors’s degree in Electrical Engineering from Thapar University, India.


Radha Krishna Singuru

Radha Krishna Singuru

DMTS - Senior Member, Wipro Technologies

Biography

Radhakrishna has graduated from IIT Kanpur, in CSE and has more than 24 years of industrial experience in product and system software development ranging from Cloud and virtualization technologies, scalable platforms, SDN, L2/L3 switching and stacking software spanning across multiple industry domains. He has filed multiple patents in the area of Network Security, Virtualization, Load Balancers, IOT, Edge Computing, Block Chain, Serverless Computing etc. He has published multiple papers in SDN, Cloud Security, Cloud Analytics, Autonomous Vehicles etc. He is a DMTS - Senior Member and Chief Architect Product POD


David Slik

David Slik

Technical Director, NetApp, Inc.

Biography

David Slik is the Technical Director for NetApp's Advanced Technology Group. He has been designing and developing object storage systems for over twenty years, is the co-chair of the SNIA Cloud Storage Technical Working Group, as well as a contributor to the Computational Storage Technical Working Group.


Boris Tankhilevich

Boris Tankhilevich

CEO, Magtera, Inc.

Biography

Ph.D in Quantum Magnetism, Academia of Sciences of former USSR
J. D. from Hastings College of the Law, CA
Registered Patent Attorney
U. S. Citizen
Co-Founded with Adam Tachner Magtera, Inc. in 2011 www.magtera.com


Niraj Tolia

Niraj Tolia

CEO, Kasten

Biography

Niraj Tolia is the CEO and Co-Founder at Kasten and is interested in all things Kubernetes. He has played multiple roles in the past, including the Senior Director of Engineering for Dell EMC's CloudBoost family of products and the VP of Engineering and Chief Architect at Maginatics (acquired by EMC). Niraj received his PhD, MS, and BS in Computer Engineering from Carnegie Mellon University.


Sidney Tsai

Sidney Tsai

Research Staff Member, Manager, IBM

Biography

HsinYu (Sidney) Tsai received her Ph.D. from the Electrical Engineering and Computer Science department at Massachusetts Institute of Technology in 2011 and joined IBM as a research staff member. Sidney currently works in the Alamden Research Center in San Jose, CA, managing the Analog AI group for deep learning acceleration using PCM-based technology. Before joining the neuromorphic computing group, Sidney worked in the IBM T.J. Watson Research Center in Yorktown Heights, N.Y, where she is developed next generation lithography for circuit applications with directed self-assembly (DSA) and managed the Advanced Lithography group in the Microelectronics Research Laboratory.


Daniel Waddington

Daniel Waddington

Research Staff Member, IBM

Biography

Dr. Waddington is currently a researcher in the Storage Systems Research Group, IBM Research Almaden, California. His current focus is around non-volatile memory and high-performance distributed storage systems. Dr. Waddington holds a Ph.D. from Lancaster University, UK and has over thirty research publications across a broad range of topics pertinent to systems building and performance optimization. He has twenty years of industrial research experience and has previously worked at Bell Labs, Lockheed Martin Advanced Technology Labs, and Samsung Research America. During his career he has applied his research to a broad array of applications including telecommunication switches, mission control and avionics systems, and mobile services. He is a senior member of the ACM.


Orit Wasserman

Orit Wasserman

Senior Principal Software Engineer, Red Hat

Biography

Orit is an experienced software engineer and architect who is passionate about open source and infrastructure with extensive experience with distributed systems and storage. Currently she is an architect at Red Hat, focusing on storage for containers, hybrid cloud, multi cloud and edge.


Ziye Yang

Ziye Yang

Staff cloud software engineer, Intel

Biography

Ziye Yang is a staff software engineer at Intel and involved in SPDK (storage performance development kit) development work. Before that, Ziye worked at EMC for 4.5 years. Ziye is interested in system virtualization, file system and storage related research and development work. Ziye currently has 15 issued patents in US and 7 issued patents in PRC. Ziye holds a master degree in computer science from Fudan University in 2009.


Jian Zhang

Jian Zhang

Software Engineer Manager, Intel Corporation

Biography

Jian Zhang is a senior software engineering manager at Intel, where he and his team primarily focus on Open Source Storage development and optimizations on Intel platforms, and build reference solutions for customers. He has over 10 years of experience in performance analysis and optimization for many open source projects such as Xen, KVM, Swift, Ceph, Spark, and Hadoop and benchmarking workloads such as those from SPEC or TPC. He earned a master's degree in Computer Science and Engineering at Shanghai Jiaotong University. He has mulitple publications and has also presented at the OpenStack Summit, Vault, Strata Data conference, Cephalocon, OFA workshop, Flash Memory Summit, Spark AI Summit etc.


Tong Zhang

Tong Zhang

Chief Scientist, ScaleFlux

Biography

Tong Zhang is a co-founder and the Chief Scientist of ScaleFlux, a Silicon Valley startup on commercializing computational solid-state storage drives. He is also currently a Professor in the Electrical, Computer and Systems Engineering Department at Rensselaer Polytechnic Institute. He received the Ph.D. degree in electrical and computer engineering from the University of Minnesota, Minneapolis in 2002. His current research areas include memory and data storage systems, computer architecture, and VLSI signal processing. He has graduated 17 PhD students, and co-authored over 160 papers, with over 5,000 citations and h-index of 40. Among his many research accomplishments, he made pioneering contributions to establishing the research area of flash memory signal processing and enabling practical implementation of low-density parity-check (LDPC) codecs in commercial data storage and communication systems. He is an IEEE Fellow.