SNIA Developer Conference (SDC)
SNIA Developer Conference
September 15-17, 2025 | Hyatt Regency Santa Clara, CA

By Developers, for Developers
SDC is a premier educational conference dedicated to providing vendor-neutral information on advancements in data technology. Delve into a dynamic environment featuring curated tutorials, insightful sessions, and keynote speakers selected by industry experts.
Whether you're a software engineer, product manager, or CTO, SDC caters to professionals across all disciplines. Join us at SDC to embrace the evolving landscape of technology and expand your expertise.

SNIA Chairman Emeritus
Industry Advisor
"Wayne Adams has over 40 years of IT industry experience spanning business development, technical product/solution management, and partner ecosystems. Wayne has been involved in SNIA leadership roles since 2002. Wayne has served on the SNIA Board of Directors since 2003 including roles as Chair, Chair Emeritus, Treasurer in addition to a number of leadership roles for forums and initiatives, conferences, and strategic alliances. He has spoken at numerous industry forums and events. Over his career, Wayne M. Adams was a Senior Technologist and Director of Standards within the Office of the CTO at EMC, technical alliances partner manager, and a manager of product managers for its portfolio of SRM products. Prior to EMC, Wayne was responsible for product marketing and business development for several strategic software and hardware products at Digital Equipment Corporation. He started his high-tech career at Eastman Kodak as a system designer of real-time control systems."

Sr. Director NAND Product Planning - Standards
Samsung
"Now that NVMe™ has ratified TP4159 PCIe® Infrastructure for Live Migration, it is time to show the final details of how NVMe controllers in direct attached PCIe SSDs can be migrated from one server to the next for use cases such as workload balancing and maintenance. In this presentation I will detail the new commands, new events, new queues, updates to existing commands, and vendor specific options. This presentation will cover how a host utilizes the new protocol to migrate a controller. There will be example implementation options for the developed controllers supporting this new capability. Included will be error scenarios and the effects of resets.
If you write host software dealing with Virtual Machines, then this presentation is for you. If you are NVMe PCIe SSD supporting multiple NVMe controllers (i.e., multiple physical functions or SR-IOV), then this presentation is for you.
Oh, this new functionality can support other use cases for example Snapshotting, and maybe more."

Scientist
Los Alamos National Laboratory

Software Engineer
SerNet Samba Team
Ralph Böhme is a member of the international Samba Team and leads the Samba team at SerNet.

Distinguished Member of Technical Staff
Micron
Anthony Constantine is a Distinguished Member of Technical Staff responsible for Storage Standards at Micron. He is very active in SNIA as co-chair of the SFF TWG, an author for several EDSFF specifications, and author or contributor to several other SFF TWG specifications. He is also a past member of the SNIA Technical Council. In addition, Anthony contributes to PCI-SIG, JEDEC, NVMe, and Open Compute Platform (OCP). Anthony has over 25 years of experience in the technology industry with an expertise in memory, storage, physical interfaces, low power technologies, and form factors. He earned a BS in Electrical Engineering from UC Davis.

Principal Engineer
Hewlett Packard Enterprise
Clarete Crasta is a Master Technologist at Hewlett Packard Enterprise. She has worked on a variety of projects and research topics including High Performance Computing, Operating Systems Kernel, Storage and Virtualization. Recently, she has been working on designing and building a software stack for Fabric Attached Memory system architecture. She has served as a member of the Technical Review Board and presented at multiple conferences including SNIA CMS 2023. She also has patents and authored paper publications.

CTO
Datadobi

Principal Software Engineer
Microsoft

Technical Staff
Dell Technologies
Hemant is an Architect at Dell Infrastructure Solutions Group & works on strategy & optimization for the Systems Management portfolio products. He has initiated and led Performance Engineering, Cloud migration, Automation, Process improvements & Simulation/Emulation related tech vitality activities in the recent past. As an Innovation Evangelist for the entire site, he drives various Innovation related activities across the Server, Storage and Services business units. Apart from this, Hemant likes to spend his free time on cycling, carpentry & photography.

Associate Technical Director
Samsung Semiconductor India Research, Bangalore
Arun George is a Software Architect working in Samsung Semiconductor India Research, Bangalore. His primary focus is on industry collaborations and research on storage and memory technologies. He has an experience of 20 years in the industry, and has a rich set of experience in host software, device firmware, software defined storages etc. He is also an author of 11 patents in the field.

Product Manager
Microsoft

Member of Technical Staff
Dell Technologies

Solutions Architect
Solidigm
Alessandro Goncalves is a seasoned Storage Solutions Architect with deep expertise at the intersection of high-performance storage and AI/ML workloads. Currently at Solidigm, he architects and benchmarks SSD-based solutions tailored for emerging AI/ML pipelines, collaborating with industry consortia like MLCommons to drive next-generation storage standards. His background includes designing persistent memory solutions at Intel for Optane and accelerating performance tracing and debugging across hyperscaler environments. Alessandro’s recent work focuses on AI/ML storage integration, including workload-aware benchmarking, storage telemetry tooling, and scalable pipelines for data-centric AI systems.

Principal Software Engineer -- Cloud Object Storage (COS) Test Tools Provisional TWG Chair
IBM -- SNIA
Adam Gray is Principal Software Engineer at IBM Cloud Object Storage and has nearly 15 years of experience in object storage. Adam primarily works in distributed systems, hyperscale computing, and mentoring students and new hires. Adam has 40+ patents issued by the USPTO and is an IBM Master Inventor. He earned his B.S. in Computer Science from Indiana University and lives and works from Chicago, Illinois.

Technical Director
Micron Technology

SSD Systems Architect - SMTS
Micron Technology

General Director
Objective Analysis
Jim Handy of Objective Analysis has over 35 years in the electronics industry including 20 years as a leading semiconductor and SSD industry analyst. Early in his career he held marketing and design positions at leading semiconductor suppliers including Intel, National Semiconductor, and Infineon. A frequent presenter at trade shows, Mr. Handy is highly respected for his technical depth, accurate forecasts, widespread industry presence and volume of publication. He has written hundreds of market reports, articles for trade journals, and white papers, and is frequently interviewed and quoted in the electronics trade press and other media. He posts blogs at www.TheMemoryGuy.com, and www.TheSSDguy.com.

Senior Director
Marvell Semiconductor
Erich Haratsch is the Senior Director of Architecture at Marvell, where he leads the architecture definition of SSD and storage controllers. Before joining Marvell, he worked at Seagate and LSI, focusing on SSD controllers. Earlier in his career, he contributed to multiple generations of HDD controllers at LSI and Agere Systems. Erich began his career at AT&T and Lucent Bell Labs, working on Gigabit Ethernet over copper, optical communications, and the MPEG-4 video standard. He is the author of over 40 peer-reviewed journal and conference papers and holds more than 200 U.S. patents. A Senior Member of IEEE, Erich earned his MS and PhD degrees from the Technical University of Munich, Germany.

Kernel Hacker
[N/A]

Distinguished Technologist -- President / SPDM WG Co-chair
HP Labs -- DMTF
This session will cover an update on DMTF's SPDM (Security Protocol & Data Model), including their strategy to support PQC (Post Quantum Cryptography). DMTF is adding bindings for storage (NVMe, SAS & SATA) as well as TCP and those will be covered as well for encryption of data in flight. Also covered will be updates to SPDM as well as the current roadmap of future releases.

Principal Research Scientist
Pliops

Technical Staff
Dell
Ugur is Technical Staff at Dell Storage CTO. Her current focus on storage for AI and object storage. She drives research, incubation, positioning, and adaptation of emerging technology and architecture for AI/ML storage. Prior to her role at Dell, Ugur completed her PhD, specializing in distributed caching for object storage in datacenters. Her interests lie broadly in the fields of storage systems, object storage, caching, distributed systems, and AI.

Senior Research Engineer
Hewlett Packard enterprise

Distinguished Engineer, Director of Industry Standards
Western Digital
Dave Landsman is Senior Director of Industry Standards and a Distinguished Engineer at Western Digital, where he manages storage standards across Western Digital’s businesses. Dave has been an active technical member in storage standards since 2008, representing SanDisk and, post-merger, Western Digital, making contributions to NVMe, PCI-SIG, JEDEC, SATA-IO, T10, T13, SNIA, SFF, and others. He is currently WD’s board representative for NVMe, SNIA, and the Compact Flash Association, and also is on the Governing Board of the DNA Data Storage Alliance Technology Affiliate group. Dave has over 35 years of experience in the technology/semiconductor industry, having spent his “first career” at Intel, and “second career” in storage, at msystems/SanDisk/WD, with brief hiatus at a startup (audio watermarks) in between. He earned a BA in computer science from the University of California, San Diego, and cut his teeth in the industry writing device driver and RTOS code.

Distinguished Engineer
Western Digital Research
Damien Le Moal manages the System Software Group within Western Digital Research. Damien has over 20 years of experience in the area of system software, operating systems and storage software solutions. Damien is involved in research activities including block device management, file systems, distributed systems, solid state and emerging NVM technologies. He is a regular contributor to the Linux kernel (I/O stack, file systems, device mapper) and is the author and maintainer of several open source projects and kernel components.

Principal Software Engineer Lead
Microsoft
Scott Lee is a Principal Software Engineer Lead in Microsoft’s Core OS group with 25+ years of industry experience and 15+ years working in Window’s storage stack. He leads the team that owns the Windows lower storage stack and the Window inbox drivers for NVMe, SATA, UFS, iSCSI and persistent and CXL memory. Scott is also an active participant in various industry standard groups covering storage, memory and system architecture.

Scientist
Los Alamos National Laboratory
TBD

Developer -- Developer
SerNet GmbH -- Samba Team
Volker Lendecke is member of the international Samba Core Team and co-founder of SerNet GmbH in Göttingen, Germany

Fellow
AMD

software architect
SerNet
"Stefan Metzmacher is working for SerNet and is a member of the international Samba Team. His focus is spread into all areas of Samba including WINS-Replication, DRS-Replication, Authentication, SMB*, DCERPC and a lot of architectural [re-]designs of common code."

Senior Staff - Research
AMD
Dr. Pratik Mishra is a Sr. Staff researcher at AMD, responsible towards path-finding efforts for incubating full-stack deployable AI Infrastructure@scale. Primarily focusing on the intersection of dense GPU AI servers and distributed storage. Dr. Mishra is associated to Ultra-Ethernet Consortium (UEC) - Storage Workgroup . Prior to joining AMD, Pratik was at Samsung Semiconductors, San Jose, CA, responsible for R&D efforts for adapting emerging high-performance "intelligent" NVMe storage device architectures in cloud/data-centric environments. Dr. Mishra holds a PhD in Computer Engineering where he worked on reducing the redundancies of the software storage IO stack for Hadoop data-centric deployments and developing near-data computation capabilities. Dr. Mishra has several core publications and patents in the field of storage and memory sub-systems.

Principal Storage Solutions Architect
Solidigm
Jason Molgaard has over 25 years of experience as a storage device controller RTL designer and architect having worked for various storage device companies architecting and designing HDD and SSD controllers. As a Principal Storage Solutions Architect on the Solidigm Pathfinding and Advanced Development Team, Jason focuses on future storage controller architectures and technologies, including Computational Storage and CXL. Jason is co-chair of the SNIA Computational Storage TWG and the SNIA Technical Council and is chair of the SDC agenda team. Jason was recognized by SNIA with an Exceptional Leadership award in 2020 and Volunteer of the Year award for 2023. Jason helps drive the Computational Storage standard at both SNIA and partner organizations including NVMe and OCP. Jason holds a Master of Science degree in Electrical Engineering.

Principal Storage Solutions Architect
Solidigm
Jason Molgaard has over 25 years of experience as a storage device controller RTL designer and architect having worked for various storage device companies architecting and designing HDD and SSD controllers. As a Principal Storage Solutions Architect on the Solidigm Pathfinding and Advanced Development Team, Jason focuses on future storage controller architectures and technologies, including Computational Storage and CXL. Jason is co-chair of the SNIA Computational Storage TWG and the SNIA Technical Council and is chair of the SDC agenda team. Jason was recognized by SNIA with an Exceptional Leadership award in 2020 and Volunteer of the Year award for 2023. Jason helps drive the Computational Storage standard at both SNIA and partner organizations including NVMe and OCP. Jason holds a Master of Science degree in Electrical Engineering.

Principal Engineer
Samsung
Oscar Pinto is a Principal Engineer in the Memory Solutions Lab at Samsung Semiconductor Inc, California. He leads software architecture and development for near data computing and CXL based memory solutions. He has 20+ years of industry experience in operating systems, storage, memory, networking, kernel and architecture development. His interests include storage and memory architectures and their interfaces, disaggregated and distributed environments and standardization. Prior to Samsung, he lead storage and system software development at Intel and contributed to the first Infiniband stack. Oscar holds 40+ issued patents and has contributed to SNIA, NVMe, NVMe-oF and Infiniband standards.

VP of Strategy
Xinnor
Sergei Platonov is the Vice President of Strategy at Xinnor, a technology company specializing in storage solutions. Sergei's journey in the tech industry began in 2010 when he graduated from the university, earning a degree in Computer Science. With a strong passion for storage technologies, he joined SDS start-up in 2009. Throughout his career, Sergei has been instrumental in the development of Storage Area Networks (SAN) and has focused on the research and implementation of cutting-edge technologies such as Flash, NVMe (Non-Volatile Memory Express), CXL (Compute Express Link), and storage performance improvement techniques. His expertise in these areas has enabled Xinnor to create highly efficient and reliable storage solutions that cater to the evolving needs of businesses. Sergei's contributions to the industry go beyond development work. He is a recognized thought leader and has delivered more than 30 presentations at conferences, sharing his insights and knowledge on storage technologies. Additionally, he has authored numerous articles, shedding light on the advancements in Storage Class Memory and its impact on storage performance.

Senior PM
Microsoft
Shruti Sethi is a Zealous professional having a deep experience in both computing and storage systems. She has 12+ years industry experience working extensively on Graphics power management, workload management, setting performance targets and Data Center storage hardware. She is currently most vested into End-to-End Cost Optimized Storage, Efficient Storage Management techniques, Pricing for Storage Services and simultaneously driving Sustainability in Storage Solutions. Shruti is a part of the strategy product team driving the next wave of initiatives in AZURE STORAGE. She is also the Steering Committee Representative of Open Compute Project's Sustainability Projects and strives to push industry Sustainability work. Shruti has a Master of Science in Computer Architecture from Georgia Institute of technology and an MBA from University of California, Berkeley (Haas School of Business).

Senior PM
Microsoft
Shruti Sethi is a Zealous professional having a deep experience in both computing and storage systems. She has 12+ years industry experience working extensively on Graphics power management, workload management, setting performance targets and Data Center storage hardware. She is currently most vested into End-to-End Cost Optimized Storage, Efficient Storage Management techniques, Pricing for Storage Services and simultaneously driving Sustainability in Storage Solutions. Shruti is a part of the strategy product team driving the next wave of initiatives in AZURE STORAGE. She is also the Steering Committee Representative of Open Compute Project's Sustainability Projects and strives to push industry Sustainability work. Shruti has a Master of Science in Computer Architecture from Georgia Institute of technology and an MBA from University of California, Berkeley (Haas School of Business).

Software Engineer
Microsoft

Scientist
Huawei Technologies Canada Co., Ltd.
David Slik is a data storage researcher at the Huawei Canadian Research Institute. Before working at Huawei, he was a Technical Director at NetApp and a co-founder of Bycast, where he led the development of StorageGRID. He has 25+ years of experience in the design, development and productization of high-performance distributed storage systems, resulting in over 90 granted patents. David is an author of two ISO/IEC standards, a contributor to five other storage industry standards organizations, and the chair of the Cloud Storage Technical Working Group at SNIA.

Founder and CEO
MEXT

CEO
Intersect360 Research
"Addison Snell is a veteran of the High Performance Computing industry and the co-founder and CEO of Intersect360 Research, delivering data and insights covering the HPC-AI market and coordinating the HPC-AI Leadership Organization (HALO). He launched his company in 2007 as Tabor Research, a division of Tabor Communications. He brought the company independent in 2009 as Intersect360 Research together with his partner, Christopher Willard, Ph.D. Under his leadership, Intersect360 Research has become a premier source of market information, analysis, and consulting for the high-performance computing (HPC) and artificial intelligence (AI). Addison is a frequent keynote speaker and panel moderator at industry events, has testified before the U.S.-China Economic & Security Review Commission Congressional Subcommittee, and was named one of 2010’s “People to Watch” by HPCwire. Prior to Intersect360 Research, Addison was an HPC industry analyst for IDC. Addison originally gained industry recognition as a marketing leader and spokesperson for SGI’s supercomputing products and strategy. Addison holds a master’s degree from the Kellogg School of Management at Northwestern University and a bachelor’s degree in Mathematics from the University of Pennsylvania. Addison is a competent bridge player, an excellent Scrabble player, and a puzzle and game enthusiast, particularly word puzzles. In 2022 he achieved a life “bucket list” goal of constructing crosswords for the New York Times."

Hardware Systems Engineer
Meta
Ross Stenfort is a Hardware System Engineer at Meta delivering scalable storage solutions. He has been involved in the development of storage systems, SSDs, ROCs, HBAs and HDDs with many successful products and over 40 patents. Some of his industry and ecosystem activities include being OCP Storage Co-Lead and a NVM Express board member.

Strategist
Seagate Technology

Director of Market Development
Solidigm
Ace Stryker is the director of market development at Solidigm, a California-based maker of SSDs, where he focuses on emerging AI technologies and the value of storage. He previously worked at Intel. He has an MBA from Cornell University and is based in the Sacramento area. In 2006, he was named the TIME Magazine person of the year.

Associate Engineer
Samsung
Anisa Su joined the Global Open eco-System Team within the memory division of Samsung as a software engineer after graduation from the University of Washington with a B.S. in Computer Science in 2024. She is interested in building expertise in systems software/memory management.

Principal Engineer, SSD Standards -- Security in Storage Working Group Chair
KIOXIA -- IEEE
Paul Suhler has been active in the data storage world for nearly thirty years, working for companies which include KIOXIA, Micron, WD/HGST, and Quantum. He is a software and firmware engineer, and has managed the development of storage devices for companies such as Quantum and Adaptec. He is the chair of the IEEE Security in Storage Working Group, and has contributed to standards developed by organizations such as NVM Express, SNIA, and the INCITS SCSI (T10) and Fibre Channel (T13) committees. He served as the Deputy Director of the USC Advanced Computer Architecture Laboratory, and commanded US Army combat engineer companies in Korea and California. He holds a PhD in computer engineering from the University of Texas at Austin. He is a Life Senior Member of IEEE and a member of ACM.

Principal Research Scientist
IBM
Vasily Tarasov is a Principal Research Scientist at IBM. His research and engineering interests revolve around data storage, focusing on high-performance storage systems for Hybrid Clouds and AI. At IBM Vasily led research projects on making IBM Spectrum Scale (GPFS) container-native, building a storage acceleration tier for AI workloads, and creating high-performance object store for data lakehouse. Most recently Vasily works on building and operating high-performance storage solutions for IBM's Vela supercomputer for AI. In the past, Vasily studied data deduplication, storage performance and workload analysis, user-space file systems, and storage for containers. Vasily holds Ph.D. degree in Computer Science from Stony Brook University, published dozens of papers in systems conferences, and regularly serves on program committees of top-tier storage conferences.

Senior Staff Software Engineer
Google
Jeff Terrace is a Senior Staff Software Engineer at Google, where he has worked on Google Cloud Storage for the past 12 years. He is a tech lead for GCS's Serving Frontend team, which maintains GCS's XML compatibility API. Prior to coming to Google, he earned his PhD in Computer Science from Princeton University where he studied distributed systems. He currently lives and works from his home in Massachusetts.

Member of Technical Staff
Pure Storage
Riley has been building high-performance data paths at Pure Storage for over a decade. He spent several years leading the performance team for Pure's flagship enterprise products, driving quality and efficiency for a $1B+ revenue stream. More recently, as a founding engineer and architect at Pure's Hyperscale Line of Business, he is building flash storage solutions for the largest applications in the world.

SMTS, Storage Solutions Architect
Micron
"Wes Vaske is a seasoned Storage Solutions Architect with over 15 years of experience in data center storage systems, currently focused on high-performance NVMe solutions optimized for AI workloads. At Micron Technology, Wes plays a pivotal role in shaping next-generation storage architectures that meet the demanding performance and efficiency needs of AI-driven data centers. He is a lead contributor to the MLPerf Storage Working Group, where he helps define industry benchmarks for AI storage performance. Wes has been instrumental in developing automation frameworks for workload execution and system observation, enabling reproducible and insightful performance analysis across diverse environments. Prior to his current role, Wes led the Data Center Workloads Engineering team for a decade, where he pioneered system observation, tracing, and analysis tools that have become foundational to Micron’s workload-first product development strategy. His earlier career includes performance engineering for Oracle RAC database systems at Dell Technologies. Wes holds a B.S. in Physics from Iowa State University and continues to drive innovation at the intersection of storage, AI, and systems performance."

Retired
Self
36-year veteran with most of that time focused on flash memory component and SSD design. He currently holds 60+ patents covering flash memory and security. He currently is a Fellow of Storage Solutions Architecture at Micron Technology.

Computer Scientist
Argonne National Laboratory

Scientist
Los Alamos National Laboratory
Qing Zheng is a Computer Scientist building next-generation HPC storage at Los Alamos National Laboratory. His work spans a range of R&D efforts that strengthen the lab’s ability to manage massive datasets—and involves close collaboration with industry and academic partners to shape future storage products. Qing holds a Ph.D. in Computer Science from Carnegie Mellon University and has been working in the HPC storage field since 2021.

SW Architect
VAST Data
Why Attend?
Attending SDC is a cost-effective way to acquire training in a host of different areas through tutorials, sessions, Keynote speakers, and special events. Take advantage of this opportunity to learn from the experts all in one place.

Agenda
From advancements in AI, CXL and NVMe to the latest on cloud and computational storage, SDC has something for everyone. Our 2025 agenda is currently in development. In the meantime you can review last year’s full agenda and presetnations.

Hotel and Venue
Located in Santa Clara, Hyatt Regency Santa Clara is a 4-minute walk from the Santa Clara Convention Center and 9 minutes by foot from Levi's Stadium. SDC has secured a reduced rate for conference attendees.

SDC News

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SNIA Plugfests at SDC’25
SNIA’s track record of multi-vendor interoperability testing events continues. Mark your calendar for our next three SNIA Plugfests in September, co-located with SDC’25. • SNIA Swordfish Plugfest September 2025 • SNIA Cloud Object Storage Plugfest • SNIA SMB3 Interoperability Lab.

Regional SDC Denver – April 30, 2025
After a successful Regional SDC in Austin, Regional SDC returned in 2025. This time in Denver. The one-day conference was packed with an outstanding lineup of experts covering AI Workloads, Cloud Object Storage, HPC-AI, NVMe SSDs, Post Quantum Crypto, CXL®, UEC, and more.

September 14-16, 2026
Mark Your Calendar for SDC 2026 – September 14-16 at the Hyatt Regency Santa Clara.
We hope you’ll join us back at the Hyatt Regency Santa Clara.

SDC brings together solution-seeking developers, engineers, architects, product/program managers, and technical marketing managers. It will also provide managers, directors, and C-level executives the opportunity to meet the industry’s leading experts and solution-providing vendors.
The audience for this conference comprises the IT development community — primarily software and hardware developers, product and solution architects, software engineers, DevOps, product managers, product quality assurance engineers, product line CTOs, product customer support engineers, and in-house IT development staff.