Speaker directory
SNIA Chairman Emeritus
Industry Advisor
Wayne Adams has over 40 years of IT industry experience spanning business development, technical product/solution management, and partner ecosystems. Wayne has been involved in SNIA leadership roles since 2002. Wayne has served on the SNIA Board of Directors since 2003 including roles as Chair, Chair Emeritus, Treasurer in addition to a number of leadership roles for forums and initiatives, conferences, and strategic alliances. He has spoken at numerous industry forums and events. Over his career, Wayne M. Adams was a Senior Technologist and Director of Standards within the Office of the CTO at EMC, technical alliances partner manager, and a manager of product managers for its portfolio of SRM products. Prior to EMC, Wayne was responsible for product marketing and business development for several strategic software and hardware products at Digital Equipment Corporation. He started his high-tech career at Eastman Kodak as a system designer of real-time control systems.
Senior Software Engineer
Rubrik
Abhinav has been working in Rubrik's filesystem team for more than 2 years. Abhinav focuses on developing high throughput filesystem in cloud environment. Before Rubrik, Abhinav completed his masters from University of Wisconsin Madison and worked in several high frequency trading firms optimizing the latency of the execution platforms. Previously, Abhinav has co-authored a talk titled "SymEngine: A Fast Symbolic Manipulation Library" at Scipy 2016 conference in Texas.
Principal Product Manager
Microsoft
With 22+ years of Industry experience, Akshay is responsible for development of highly scalable, highly durable object storage that supports Data Ingestion and Data Storage of PetaBytes of data. This involves Data Preparation by supporting industry leading solutions for big data analysis and best Azure Storage services dealing with efficient management of data. This spans data managed for storage used for a variety of applications from cold usage to hot AI supporting data storage. Akshay has a Master of Science in Computer Architecture & Computer Science from Syracuse University.
SM Chair, SNIA Vice Chair, and Swordfish TWG Chair; Director of Ecosystem Enabling and Technology Initiatives
Intel
Richelle Ahlvers runs Technology Initiatives and Ecosystem Enabling for the Datacenter / AI business for Intel, promoting and driving enablement of new technologies and standards strategies. Richelle has spent over 30 years in Enterprise R&D teams in a variety of technical roles, spanning architecture, design and development of software, firmware, and hardware, for everything from enterprise storage solutions to CPUs. Richelle has been engaged with industry standards initiatives for many years and is actively engaged with many groups including SNIA, DMTF, NVMe, OFA and UCIe. She is Vice-Chair of the SNIA Board of Directors, Chair of the Storage Management Initiative, leads the SSM Technical Work Group developing the Swordfish Scalable Storage Management API, and is a former SNIA Technical Council Chair. She serves on the DMTF Board of Directors as the VP of Finance and Treasurer.
Senior Director - NAND Product Planning - Standards
Samsung
Mike Allison is a Sr. Director in the Samsung DSA Product Planning team focusing on standards for existing and future products. Mike is active in the many standards organizations that includes SNIA, NVM Express™, PCI Express™, DMTF, and OCP. He is the chair of the NVM Express Errata Task Group and the Representative on the OCP Steering Committee for the OCP Storage Project. He was the main author of the NVM Express TP4159 PCIe Infrastructure for Live Migration and TP4193 PCIe NVM Export Subsystem Migration which are associated with his presentation. For over 41 years, Mike has been an embedded firmware engineer and architect working on products for laser beam recorders, fighter aircraft, graphics cards, high end servers, and is now focusing on Solid State Drives. He holds 35 patents in graphics, servers, and storage. He has earned a BSEE/CS at University of Colorado, Boulder.
Strategist, Technology Enablement
--
Technical Counci
--
Technical Counci
HPE
--
SNIA
--
SNIA
Curtis Ballard is a Distinguished Technologist with Hewlett Packard Enterprise in the HPE Storage organization where he works on storage architecture, intellectual property, and storage technology strategy with a focus on enabling new storage technologies. Curtis has 30 years of experience in storage and storage interfaces technologies where he has worked in product design teams for storage arrays, storage enclosures, tape drives, tape libraries, and magneto optical drives. He has developed hardware designs for storage interfaces and storage controllers as well as firmware for motion control, storage interfaces, user interface, and embedded operating systems.
In addition to Storage Platform development for HPE, Curtis also represents HPE in several industry organizations. Curtis is a treasurer for the NVM Express Board of Directors, is a member of the SNIA Technical Council, and is the vice-chair of the INCITS/SCSI (T10) Storage Interfaces Technical Committee where he has been the editor for several SCSI standards. He is an inventor on over 40 US patents in the storage industry across electrical, software, and mechanical disciplines.
Storage Janitor
Magnition IO
Andy was born a poor sys admin. Andy has over 30 years of experience in high-tech industry giants. He worked on development teams at SCO, Sun Microsystems, VMware and NetApp-SolidFIre producing primarily storage and networking products. Andy is known for promoting simplicity and economy and has presented at numerous conferences, technology events and podcasts. Andy is currently working with Magnition IO and participating in Tech Field Day Events. Outside of high tech, Andy is involved in auto racing, auto restoration and hiking. His interests include travel, wines and food.
Principal Engineer - Storage Software Architect
Solidigm
Mariusz is a Principal Engineer in Solidigm. His storage software and storage solutions experience is over 15 years. His work area is finding innovations for storage software. In particular caching solutions, software defined storage, virtualization, and storage analytics. This is confirmed by numerous patents and open source activity. His recent work is focused on leading the team of Cloud Storage Acceleration Layer (CSAL) which delivers mixed media solutions combining Solidigm SLC and TLC with other storage components like Soldigim QLC SSD drives, to deliver efficient, high capacity, and durable storage.
Software Engineer
SerNet Samba Team
Ralph Böhme is a member of the international Samba Team and leads the Samba team at SerNet.
Principal
Syncopated Systems
John Carlsen is an electronic multimedia pioneer who contributed to the development of the first television tuner card for personal computers, early PC sound cards, and CD-ROM interfaces, and supervised the first pressing of Microsoft Windows on CD-ROM. After working for video game legends Atari, Atari founder Nolan Bushnell, and Activision, Mr. Carlsen co-founded game developer Iguana Entertainment, which created the Batman Forever arcade game, NFL Quarterback Club series games, home versions of NBA Jam, and some of the first Nintendo 64 games, including Turok: Dinosaur Hunter and the first South Park game. Afterward, he created the reference design used for most flash-based MP3 players, including the first Apple iPod Shuffle, and led hardware development for a Sony PlayStation. Mr. Carlsen has earned degrees in management and computer science from Saint Edward’s University (Austin, TX), and has taught computer game development. Mr. Carlsen is an IEEE Senior Member, is on the IEEE Silicon Valley Technology History Committee, is a recent chair of IEEE’s largest consultants’ network, and provides consulting and development services as Syncopated Systems.
Senior Manager
Samsung
Swati Chawdhary is a Senior Manager at Samsung. She has diverse experience in Storage domain. Her recent work focuses on the test and development of NVMe-oF/NVMe controllers and All Flash Array reference designs. Before joining Samsung, she worked at Chelsio Communications, where she contributed to the development of their Unified Wire Adapters. She has participated in conferences like IEEE Wintechcon, FMS, SDC US/India and NVMe developer Days. She earned a Bachelor's degree in Computer Science from Pune University.
VP Product Marketing
Hammerspace
Christofferson brings more than 25 years of content creation, content management and storage expertise focused on the methods and technologies needed to use and manage massive volumes of data. Most recently, he was CEO of StrongBox Data Solutions, an autonomous data management and data archiving provider. Previously, Christofferson served as CMO at Arcitecta IP Pty Ltd, a comprehensive data management platform company, and as Director, Storage Product Marketing at SGI for its InfiniteStorage products.
Distinguished Member of Technical Staff
Micron Technology
Anthony Constantine is a Distinguished Member of Technical Staff responsible for Storage Standards at Micron. He is very active in SNIA as co-chair of the SFF TWG, an author for several EDSFF specifications, and author or contributor to several other SFF TWG specifications. He is also a past member of the SNIA Technical Council. In addition, Anthony contributes to PCI-SIG, JEDEC, NVMe, and Open Compute Platform (OCP). Anthony has over 25 years of experience in the technology industry with an expertise in memory, storage, physical interfaces, low power technologies, and form factors. He earned a BS in Electrical Engineering from UC Davis.
Principal Engineer
HPE
Clarete Crasta is a Principal Engineer in Hewlett Packard Enterprise, currently working in the HPC and AI Advance Development group. She is a well-recognized technical architect and has built a solid reputation over 20 years with deep system software expertise in High Performance Computing, memory and storage technologies, operating systems kernel, platform & IO, and virtualization. Her ability to drive and lead teams, focus on customers, willingness to take up any complex work in newer areas, effective communication skills, and active collaboration has gained her acceptance across the community. Clarete has experience leading and collaborating across teams, business units, customers and partners. She is a co-inventor on 7 US filed patents and has co-authored 7 publications. She has presented at various conferences such as SNIA CMS, SNIA SDC, CUG, GHCI on Fabric Attached Memory and related topics. She has worked as a member of the technical committee and review board for GHCI, IEEE and has served as a PC member for IC2E. She holds a master’s degree in software engineering and bachelor’s in electrical engineering.
CTO
Datadobi
Carl D’Halluin brings over 25 years of deep expertise in designing distributed storage systems. He was a core architect behind Dell EMC Centera, the world’s first commercial object storage system. Centera established early standards for immutable and compliant storage. Carl was also the lead architect at Q-layer, a pioneer in cloud virtualization technology later acquired by Sun Microsystems. He continued pushing innovation at Amplidata as Chief Architect, designing an ultra-scalable, geo-distributed S3-compatible storage system. Following successive acquisitions by Western Digital and Quantum, this product is currently known as Quantum ActiveScale Object Storage. Now serving as Chief Technology Officer at Datadobi, Carl has shifted focus from the storage backend to the client layer, building intelligent software solutions for data analysis and data mobility in large-scale hybrid cloud environments, across file and object storage. An inventor at heart, Carl holds more than 25 patents in data storage technologies. His work continues to advance the state of the art in high-performance, hybrid data infrastructure for the enterprise.
Senior Researcher
HPE
Khaled is senior researcher at the networking and distributed systems lab in HP Labs. His research interests broadly span networking, systems, and their intersection. The main research objective of his research is to make networked systems run more efficiently! Therefore, his work often addresses a variety of challenges at different system levels. He has been recently working in various areas such as CXL memory sharing, scale-up fabrics, high-speed networks, systems and networking for AI, and AI for networking. Previously, Khaled's research covered areas such as multicast systems, datacenter networking, multimedia systems, cloud gaming, and GPU virtualization. Khaled received his PhD from Simon Fraser University, Canada in 2019.
Principal Software Engineer
Microsoft
Chet Douglas is a Principal Software Engineer with over 30 years of experience working with storage, RAID, SSDs, Flash Memory, persistent memory, and Windows kernel driver development. Chet has architected & authored significant portions of the CXL spec including the CXL 2.0 CCI mailbox interface, CXL Driver Writers Guide, CXL RAS whitepaper, CXL 3.0 Dynamic Capacity for memory pooling/sharing, the CXL 3.1 Trusted Security Protocol (TSP) for confidential computing with CXL.mem, and CXL 3.2 TSP additions for HDM-DB and CXL.cache support.
Chief Technologist of Cloud Storage Systems
Seagate Technology
Mohamad El-Batal is the Chief Technologist of Cloud Storage Systems within the Seagate’s Office of the CTO. In his role at Seagate, Mohamad is given the opportunity to help shape the storage systems strategy and its future foundational technology roadmap. Mohamad holds a BS degree in Electrical and Computer Engineering and did Graduate work on Digital Signal Processing at the University of Colorado at Boulder. In his career, since 1990, Mohamad charted new grounds in various fields of enterprise and modern datacenter storage architectures that spanned various innovative engineering disciplines. Mohamad is on the Board of Directors of the Non-Volatile Memory Express (NVMe), Future Memory and Storage (FMS), and on the Open Compute Project (OCP) Advisory Board. Mohamad is currently the chairing multiple OCP data storage, memory and data connectivity/composability workstreams. Mohamad participated technically and influenced various industry standard groups including FC, SAS, NVMe, CXL and DMTF consortiums. In his career, Mohamad worked at leading enterprise storage technology and cloud provider companies, including Tandem, EMC, Mylex, IBM, LSI, Engenio, NetApp, Avago, and now Seagate. Mohamad has 30+ year history of enterprise and cloud storage architecture knowledge, experience, and innovation.
Mohamad holds 50+ issued and 20+ pending patents, covering: High-Availability/Resiliency Storage and Memory solutions, SSD controller and Composable Systems architecture focus areas. https://www.linkedin.com/in/mohamad-el-batal-3055151/
CEO, Co-Founder
Hammerspace
Hammerspace founder and Chief Executive Officer David Flynn is a recognized leader in IT innovation who has been architecting disruptive computing platforms since his early work in supercomputing and Linux systems. David pioneered the use of flash for enterprise application acceleration as founder and former CEO of Fusion-io, which was acquired by SanDisk in 2014. He served as Fusion-io President and CEO until May 2013 and board member until July 2013. Previously, David served as Chief-Architect at Linux Networx where he was instrumental in the creation of the OpenFabrics stack and designed several of the world’s largest supercomputers leveraging Linux clustering, InfiniBand, RDMA-based technologies. David holds more than 100 patents in areas across web browser technologies, mobile device management, network switching and protocols to distributed storage systems. He earned a bachelor’s degree in computer science at Brigham Young University and serves on boards for several organizations and startup companies.
Principal Engineer
Pure Storage
Josh Freilich is a Principal Engineer at Pure Storage, where he co-designs software with Hyperscalers to support data storage at extreme scale. Over the past decade, he has led the development of innovative solutions in host-based NAND management, I/O scheduling, storage virtualization, and virtual memory management. He holds dozens of issued patents in these domains. Josh earned his Bachelor of Science in Computer Science and Applied Mathematics from Brown University, with a focus on systems architecture and probability theory.
Principal Software Engineer
Microsoft
Technical Staff
Dell Technologies
Hemant is an Architect at Dell Infrastructure Solutions Group & works on strategy & optimization for the Systems Management portfolio products. He has initiated and led Performance Engineering, Cloud migration, Automation, Process improvements & Simulation/Emulation related tech vitality activities in the recent past. As an Innovation Evangelist for the entire site, he drives various Innovation related activities across the Server, Storage and Services business units. Apart from this, Hemant likes to spend his free time on cycling, carpentry & photography.
Associate Technical Director
Samsung Semiconductor India Research
Arun George is a Software Architect working in Samsung Semiconductor India Research, Bangalore. His primary focus is on industry collaborations and research on storage and memory technologies. He has an experience of 20 years in the industry, and has a rich set of experience in host software, device firmware, software defined storages etc. He is also an author of 11 patents in the field.
Principal Memory Solutions Architect
MPS
Mr. Gervasi has nearly 5 decades of experience in high speed memory subsystem definition, design, and product development. He piloted the definition of Double Data Rate SDRAM since its earliest inception, authoring the first standard specification, and created the Automotive SSD standard. With MPS, Bill is driving some of the memory and storage system management mechanisms for a post-quantum world. He received the JEDEC Technical Excellence award, their highest honor, in 2020.
Product Manager
Microsoft
Mariam is a Security Product Manager at Microsoft, driving the strategy and execution of initiatives to harden Windows authentication and eliminate legacy protocols such as NTLM. With a background in both engineering and program management, Mariam partners closely with product teams, customers, and the broader security ecosystem to modernize identity protocols and improve enterprise authentication experiences. Her work focuses on bridging technical depth with practical adoption, helping organizations navigate the complexities of transitioning from legacy authentication in storage and networking scenarios. Mariam holds a doctorate in Computer Science with a concentration in Cybersecurity, and is passionate about building secure, scalable systems that meet real-world enterprise needs.
MWG Co-Chair
CXL Consortium
Anil Godbole is a CXL Marketing Working Group Co-Chair and Senior Marketing Manager for Intel’s Xeon Product Planning and Marketing Group. His domain is in Memory, Serdes Technologies & Associate Protocols (DDRx, CXL, PCIe, Ethernet, etc.). Previously, he held a position as Design Engineer in CPU-support ASICs, FPGAs.
Member of Technical Staff
Dell Technologies
Jason is a Storage Architect at Dell Technologies, working in the Storage Chief Technology Office. His role involves leading the development of next-generation storage and network protocols for both Public and Private Clouds. Throughout his career, Jason has focused on enterprise storage and meeting the needs of customers who want to expand beyond the traditional on-premises data center. He enjoys collaborating with customers and partners to understand their requirements when transforming their business. In his personal life, Jason is passionate about running marathons and baking artisan bread. He lives in Newton, Massachusetts, with his wife and their three children.
Solutions Architect
Solidigm
Alessandro Goncalves is a seasoned Storage Solutions Architect with deep expertise at the intersection of high-performance storage and AI/ML workloads. Currently at Solidigm, he architects and benchmarks SSD-based solutions tailored for emerging AI/ML pipelines, collaborating with industry consortia like MLCommons to drive next-generation storage standards. His background includes designing persistent memory solutions at Intel for Optane and accelerating performance tracing and debugging across hyperscaler environments. Alessandro’s recent work focuses on AI/ML storage integration, including workload-aware benchmarking, storage telemetry tooling, and scalable pipelines for data-centric AI systems.
Principal Software Engineer
--
Cloud Object Storage (COS) Test Tools Provisional TWG Chair
--
Cloud Object Storage (COS) Test Tools Provisional TWG Chair
IBM
--
SNIA
--
SNIA
Adam Gray is Principal Software Engineer at IBM Cloud Object Storage and has nearly 15 years of experience in object storage. Adam primarily works in distributed systems, hyperscale computing, and mentoring students and new hires. Adam has 40+ patents issued by the USPTO and is an IBM Master Inventor. He earned his B.S. in Computer Science from Indiana University and lives and works from Chicago, Illinois.
Technical Director
Micron Technology
John Groves has been a kernel and system software developer for decades, working on memory management, file systems and data storage in several Unix variants prior to Linux. John serves the CXL Consortium as co-chair of the Software and Systems Working Group (SSWG), and is a contributor to the CXL specification - particularly in the areas of fabric management, shared memory and dynamic capacity devices (DCDs). John is also the creator and primary author of famfs – the Fabric-Attached Memory File System – which is working its way toward inclusion the Linux Kernel. John has spoken on famfs at the last two Linux Plumbers conferences (2023 and 2024) as well as the Linux Storage, Filesystem and Memory Management (LSFMM) summits in 2024 and 2025 and Usenix FAST in 2025. John is an expert in system software development, cache coherency, memory models and CXL.
EnSoftware Development Manager, Object Storage
IBM
Daniel is a senior object storage developer, a current maintainer of NFS-Ganesha and it’s RPC stack ntirpc, and an engineering manager in IBM’s Ceph storage team. Daniel is the author and maintainer of Ceph RGW’s Zipper API.
SSD Systems Architect - SMTS
Micron Technology
Chandra Mouli Guda received his M.S in Electrical Engineering (2008) from New Jersey Institute of Technology (Newark, New Jersey USA). Mr. Guda is a Senior Member of Technical Staff at Micron since 2018. He is currently an SSD Systems Architect in the SSD Engineering Organization driving technical architecture for Datacenter NVMe SSD products. Mr. Guda is currently leading QoS/Performance Taskforce and SSD AI Workload Analysis Taskforce for Datacenter SSDs at Micron. Mr. Guda has over 30 patents granted in caching architectures, Performance, QoS, ASIC features, Erase suspend and resume schemes, NAND die recovery schemes, for SSDs, SSHD, HDDs etc.
General Director
Objective Analysis
Jim Handy of Objective Analysis has over 35 years in the electronics industry including 20 years as a leading semiconductor and SSD industry analyst. Early in his career he held marketing and design positions at leading semiconductor suppliers including Intel, National Semiconductor, and Infineon. A frequent presenter at trade shows, Mr. Handy is highly respected for his technical depth, accurate forecasts, widespread industry presence and volume of publication. He has written hundreds of market reports, articles for trade journals, and white papers, and is frequently interviewed and quoted in the electronics trade press and other media. He posts blogs at www.TheMemoryGuy.com, and www.TheSSDguy.com.
Computer Scientist
Livermore Computing Division, Lawrence Livermore National Laboratory
Nathan Hanford is a Computer Scientist in the Livermore Computing Division at Lawrence Livermore National Laboratory. His research is currently focused on application and development environment portability for parallel software applications at the application binary interface (ABI). His operational work is focused on development environment design and verification, message passing interface (MPI) support and development, and system-wide accelerator-aware interconnect benchmarking for codesign, system acceptance, and strategic decision-making support.
Senior Director
Marvell
rich Haratsch is the Senior Director of Architecture at Marvell, where he leads the architecture definition of SSD and storage controllers. Before joining Marvell, he worked at Seagate and LSI, focusing on SSD controllers. Earlier in his career, he contributed to multiple generations of HDD controllers at LSI and Agere Systems. Erich began his career at AT&T and Lucent Bell Labs, working on Gigabit Ethernet over copper, optical communications, and the MPEG-4 video standard. He is the author of over 40 peer-reviewed journal and conference papers and holds more than 200 U.S. patents. A Senior Member of IEEE, Erich earned his MS and PhD degrees from the Technical University of Munich, Germany.
Kernel Hacker
[N/A]
Christoph Hellwig has been working with and on the Linux kernel since 1999. In addition he is or was involved with various other Open Source projects. After a number of smaller network administration and programming jobs he worked for Caldera's German development subsidiary on various kernel and user level aspects of the OpenLinux distribution. Since 2004 he has been running his own consulting business specializing in Linux file systems and storage, but also working on virtualization and the RISC-V open source instruction set. He is an active participant in the NVMe technical working group and the IEFT Network File System Version 4 working group. He is one of the maintainers of the NVMe driver in Linux, and one of the busiest contributors to the Linux kernel. Christoph Hellwig has worked for well known customers such as Dell, Facebook, IBM, NetApp, Red Hat, Silicon Graphics, Sony Interactive Entertainment, Western Digital and various startups.
Principal Architect
Samsung
Dan is a Principal Architect focusing on future generation NVMe SSDs for Samsung Semiconductor. A strong background in HDD Control Systems has folded into performance FW in SSDs and future product architectures for storage products of several different medias. Dan has worked closely with customers to understand future requirements, develop industry leading standards to achieve those requirements, and design the product feature for servicing the new standardized feature. He has been a primary SSD Architect shaping features such as Zoned Namespaces (ZNS), Flexible Data Placement (FDP), Live Migration (LM), Quality of Service (QoS), and many more industry leading features.
President / SPDM WG Co-chair; Distinguished Technologist
HPE
This session will cover an update on DMTF's SPDM (Security Protocol & Data Model), including their strategy to support PQC (Post Quantum Cryptography). DMTF is adding bindings for storage (NVMe, SAS & SATA) as well as TCP and those will be covered as well for encryption of data in flight. Also covered will be updates to SPDM as well as the current roadmap of future releases.
Principal Research Scientist
Pliops
Eshcar Hillel is leading AI research at Pliops, driving storage solutions for emerging workloads such as generative AI, deep learning recommender systems, and learning systems in general. Eshcar specializes in theory and practice of distributed systems and in parallel computing. Prior to joining Pliops, Eshcar was a research director at Yahoo Research, was a contributor and PMC of open source projects, published and presented over 25 scientific papers in leading academic venues; also holds several U.S. patents. She holds a Ph.D. in computer science from the Technion, Israel Institute of Technology.
Principal Product Manager
Microsoft
Scott Hoag is a Product Manager in Azure Object Storage, responsible for the end-to-end experience of customers using Azure Object Storage. As a product manager, trusted consultant, trainer, public speaker, and author that has been working with Microsoft technologies for 20 years, Scott is well-versed in the end-to-end delivery of software and how customers use it to achieve more.
Senior Director
Cisco
Chih-Tsung Huang is the Senior Director of Hardware Engineering in the Common Hardware Group responsible for delivering sustainable solutions for the silicon, hardware systems and optics for Cisco’s switching, routing, optical, cable access and IoT portfolios.
Technology Architect
--
Chair
--
Chair
Broadcom
--
INCITS/Fibre Channel Technical Committee
--
INCITS/Fibre Channel Technical Committee
Howard is the chair of the INCITS/Fibre Channel techncial committee and remains actively involved in the development of Fibre Channel standards. As Broadcom's technical liaison to many Fibre Channel industry partners, Howard joined the forces of the Fibre Channel ecosystem vendors to deliver products based on the Fabric Notifications standards and architecture for the Fibre Channel industry. These efforts developed solutions that leveraged Fabric Notifications in the formation of autonomous SAN technology. Howard began his career in 1984 developing configuration applications for 3270 Cluster Controllers for McDATA Corporation in Boulder, Colorado. In 1993, in partnership with IBM, Howard was part of the team that created the ESCON Director Models 3/4/5 as well as the FICON to ESCON Bridge. As technical leader, he directed the efforts of the technical teams that expanded IBM’s original storage-area networks (SAN) from ESCON to FICON. In 2007, Howard joined Brocade, a Broadcom company, as a member of the Fabric Operating Systems Architecture group and is responsible for the technical strategy relating to Brocade’s mainframe infrastructure offerings. His industry experience lead to a featured interview in Enterprise Executive (2019, issue 6), where he discussed the future of the mainframe, FICON, and Fibre Channel. Today, Howard is an active member of the Brocade SAN Networking (BSN) division of Broadcom Limited and continues his technical leadership in enterprise networking solutions. With more than 40-years of professional experience in high-end processing environments, Howard remains an active advocate of Fibre Channel.
Technical Staff
Dell Technologies
My role involves leading the development of next-generation storage access protocols and connectors, and optimizing storage data path for AI & emerging workloads. I am a PhD in object storage and my research interests lie in object storage, caching, storage systems and protocols, and storage optimizations for AI.
VP Market Intelligence and Innovation
OCP Foundation
James joined the OCP Foundation staff in 2024 as VP Market Intelligence and Innovation, working with technology leaders in the community and augmenting the foundation’s directional strategy, innovation efforts and marketing. His contributions to the OCP proceed from over two decades of experience in technology research, engineering, product management and marketing.
AI Engineer and PhD Candidate
Independent
Babar Khan is a software-hardware engineer holding B.Sc. and M.Sc. degrees in Electrical Engineering and currently pursuing a Ph.D. in Computer Science, specializing in distributed storage and hardware accelerators (FPGAs, ASICs, and GPUs). Since 2024, he has been working as an AI engineer at a stealth startup, focusing on leveraging AI chips for language models. Previously, he has worked at Intel Germany, SAP Germany, and spent four years as a broadcast TV engineer at a leading media company. Babar actively contributes to open-source software and hardware projects and occasionally answers questions on Stack Overflow. He is multilingual, fluent in five languages.
Product Management
Self Employed
Multiple years expertise in business and technology management. Passionate about discovering new technologies and markets to help build and grow new high-tech products. Past experience includes Product Management in Storage, Networking and System Software. Other passions include helping bring Green Technologies to the market.
Senior Research Engineer
HPE
Annmary Justine K is a Senior Research Engineer at Hewlett Packard Labs with over 18 years of experience in developing distributed, scalable, and highly available enterprise systems. Her current research focuses on building infrastructure for distributed AI pipelines and advancing techniques for extracting meaningful insights from data. She has contributed extensively to metadata, provenance, and lineage tracking in AI workflows. Annmary leads the development of the Common Metadata Framework—a distributed tracking system powering the Fusion Data Platform, funded by the U.S. Department of Energy. She holds over 16 patents and has authored more than 25 peer-reviewed publications.
Distinguished Engineer
Western Digital
David Landsman manages storage standards for Western Digital. He has been a technical representative, committee chair, and/or Board member in NVMe, PCI-SIG, T10 (SAS/SCSI), T13 (ATA), SATA-IO, TCG, JEDEC, OCP, SNIA, SFF, and others, contributing to standards at all levels of the storage hierarchy (mechanical, electrical, and protocol).
Distinguished Engineer
Western Digital
Damien Le Moal manages the open-source system software group in Western Digital Research. He is a regular contributor to Linux kernel block, scsi and device-mapper subsystems and the author of zonefs.
Scientist
Los Alamos National Laboratory
Jason Lee is a software engineer at Los Alamos National Laboratory focusing on high performance filesystem design and performance. His work has been focused on making filesystem metadata more accessible to all and improving the overall performance of filesystems via computational storage.
Principal Software Engineer Lead
Microsoft
Scott Lee is a Principal Software Engineer Lead in Microsoft’s Core OS group with 25+ years of industry experience and 15+ years working in Window’s storage stack. He leads the team that owns the Windows lower storage stack and the Window inbox drivers for NVMe, SATA, UFS, iSCSI and persistent and CXL memory. Scott is also an active participant in various industry standard groups covering storage, memory and system architecture.
Fellow
AMD
Bill Lynn is an engineering Fellow at AMD. Bill has over 40 years’ experience architecting and developing storage subsystems. Bill started out as a disk drive designer with Digital Equipment Corporation designing 9”, 5.25”, 3.5” and 2.5” disk drives. Later he moved to Adaptec working in sales, marketing, and eventually the Office of the CTO as a RAID architect. During his tenure at Adaptec Bill helped form the SNIA IP Storage Forum and served as the forum chair for 2 years. Bill ran the early iSCSI interoperability events before transitioning the iSCSI interoperability effort to UNH. Bill was also one of the authors of the Infiniband specification. In 2006 Bill moved to Dell where he was responsible for server storage architecture. Bill was the original author of the SFF-8639 U.2 connector specification, one of the current editors of the SFF-TA-1008 EDSFF E3 device specification and served as Dell’s representative to the NVMe Board of Directors. Bill moved to AMD in 2023 as part of AMD’s Data Center Architecture and Strategy group.
Associate Technical Director
Samsung Semiconductor India Research
Sathish Kumar is a seasoned Storage Test Architect with over 19+ years of rich industry experience in enterprise storage, server platforms, and system testing. Currently serving as an Associate Technical Director at Samsung Semiconductor India Research, he leads the Solutions System Test team, delivering end-to-end qualification of NVMe over Fabrics solutions and contributing to Open Compute Project (OCP) forums. Throughout his career, Sathish has built deep technical expertise across companies like Dell EMC, Brocade, and Adaptec. He has architected scalable test strategies, developed automation frameworks, led cross-functional teams, and mentored engineers to achieve business and technical goals. His hands-on proficiency in Python, storage protocols (FCP, SAS, SCSI), virtualization technologies, and RESTful APIs underscores his versatile skill set. A recognized innovator, Sathish holds a U.S. patent on intelligent test automation using reverse-engineered REST API specifications. He has also been an active contributor to global tech forums, presenting at OCP Summit & Future of Memory and Storage in the U.S.
MTS, Systems Performance Engineer
Micron Technology
J. Mazzie received an M.S. in electrical engineering from West Virginia University (Morgantown, WV) in 2008. He is currently a MTS, Systems Performance Engineer, at Micron Technology, Inc. (2016-Present: TX, USA). John previously held roles at Dell, Inc. (Senior Storage Engineer) and WVHTC Foundation (Staff Engineer). He is currently focused on application performance analysis and tracing, as well as tool development.
Chair of SNIA’s Board of Directors; Technical Director for Systems Design
AMD
J is the Chair of SNIA’s Board of Directors and Technical Director for Systems Design for AMD where he works to coordinate and lead strategy on various industry initiatives related to systems architecture. Recognized as a leading storage networking expert, J is an evangelist for all storage-related technology and has a unique ability to dissect and explain complex concepts and strategies. He is passionate about the innerworkings and application of emerging technologies.
J has previously held roles in both startup and Fortune 100 companies as a Field CTO, R&D Engineer, Solutions Architect, and Systems Engineer. He has been a leader in several key industry standards groups, sitting on the Board of Directors for the Storage Networking Industry Association (SNIA), Fibre Channel Industry Association (FCIA), and Non-Volatile Memory Express (NVMe). A popular blogger and active on Twitter, his areas of expertise include NVMe, SANs, Fibre Channel, and computational storage.
J is an entertaining presenter and prolific writer. He has won multiple awards as a speaker and author, writing over 300 articles and giving presentations and webinars attended by over 10,000 people. He earned his PhD from the University of Georgia.
Software Architect
SerNet
Stefan Metzmacher is working for SerNet and is a member of the international Samba Team. His focus is spread into all areas of Samba including WINS-Replication, DRS-Replication, Authentication, SMB*, DCERPC and a lot of architectural [re-]designs of common code.
Senior Staff - Research
AMD
Dr. Pratik Mishra is a Sr. Staff researcher at AMD, responsible towards path-finding efforts for incubating full-stack deployable AI Infrastructure@scale. Primarily focusing on the intersection of dense GPU AI servers and distributed storage. Dr. Mishra is associated to Ultra-Ethernet Consortium (UEC) - Storage Workgroup . Prior to joining AMD, Pratik was at Samsung Semiconductors, San Jose, CA, responsible for R&D efforts for adapting emerging high-performance "intelligent" NVMe storage device architectures in cloud/data-centric environments. Dr. Mishra holds a PhD in Computer Engineering where he worked on reducing the redundancies of the software storage IO stack for Hadoop data-centric deployments and developing near-data computation capabilities. Dr. Mishra has several core publications and patents in the field of storage and memory sub-systems.
Principal Architect
Leil Storage
A renowned expert in software-defined storage, with years of experience building scalable and efficient systems for a variety of industries. His background includes working at Google, where he gained invaluable insights into large-scale distributed systems. Also, he is a founder and creator of LizardFS - open-sourced, distributed, scalable, and fault-tolerant file system. LizardFS a was successful clone of GoogleFS with the POSIX interface and other perks like erasure coding. Today, he brings his expertise to Leil Storage, where he helps to create green cloud storage for backup and archive by exploring the advantages of host-managed SMR drives.
Principal Storage Solutions Architect
Solidigm
Jason Molgaard has over 25 years of experience as a storage device controller RTL designer and architect having worked for various storage device companies architecting and designing HDD and SSD controllers. As a Principal Storage Solutions Architect on the Solidigm Pathfinding and Advanced Development Team, Jason focuses on future storage controller architectures and technologies, including Computational Storage and CXL. Jason is co-chair of the SNIA Computational Storage TWG and the SNIA Technical Council and is chair of the SDC agenda team. Jason was recognized by SNIA with an Exceptional Leadership award in 2020 and Volunteer of the Year award for 2023. Jason helps drive the Computational Storage standard at both SNIA and partner organizations including NVMe and OCP. Jason holds a Master of Science degree in Electrical Engineering.
Fellow
AMD
William Moyes is a key contributor and Editor for the SDXI specification. He is an AMD Fellow and End-to-End Server Architect with 25 years of experience in the PC ecosystem. His background includes Security, Storage, Firmware, and Persistent Memory. He also serves on the UEFI board of directors.
Distinguished Engineer
NVIDIA
Chris J. Newburn, who goes by CJ, is a Distinguished Engineer who drives HPC strategy and the technical IO roadmap in NVIDIA GPU Cloud, focused on pushing the envelope for storage and networking programming models at scale, data center architecture and security, and scaled systems. He is a community builder with a passion for building an ecosystem that extends the core capabilities of hardware and software platforms from HPC into AI, data science, and visualization. He co-leads the Storage-Next effort to optimize products for IOPs/TCO. He tinkers with and leverages NVIDIA and vendor products in a lab packed with scaled compute, storage and networking gear to apply and extend new tech. He's delighted to have worked on volume products that his Mom used and that help researchers do their life's work in science that previously wasn't possible.
Director of Engineering
Samsung
Pramod Peethambaran is a visionary technology leader with 20+ years of experience building multi-functional teams and world class products catering to cloud infrastructure focused on Storage/memory, System Software, AI/ML platform & Networking. As Director of Engineering in Samsung Semiconductors, he has led memory software platform, Samsung Cognos. His vast experience spans building software products for Semiconductor, Multimedia, Automotive, telecom and networking industry. He has IEEE publication on Cyber Security (computational storage-based deep learning inference functionality to combat ransomware) and patents granted in the AI/ML processor architecture optimizations (transaction-based instruction set architecture) and patents pending in the field of offloading based performant storage solutions and VoIP/networking. He has also served as a webinar presenter on optimizing data architecture for scale and performance.
VP of Strategy
Xinnor
Sergei Platonov is the Vice President of Strategy at Xinnor, a technology company specializing in storage solutions. Sergei's journey in the tech industry began in 2010 when he graduated from the university, earning a degree in Computer Science. With a strong passion for storage technologies, he joined SDS start-up in 2009. Throughout his career, Sergei has been instrumental in the development of Storage Area Networks (SAN) and has focused on the research and implementation of cutting-edge technologies such as Flash, NVMe (Non-Volatile Memory Express), CXL (Compute Express Link), and storage performance improvement techniques. His expertise in these areas has enabled Xinnor to create highly efficient and reliable storage solutions that cater to the evolving needs of businesses. Sergei's contributions to the industry go beyond development work. He is a recognized thought leader and has delivered more than 30 presentations at conferences, sharing his insights and knowledge on storage technologies. Additionally, he has authored numerous articles, shedding light on the advancements in Storage Class Memory and its impact on storage performance.
Expert
HPE
Nuthan Prasad is a technology professional specializing in Generative AI (GenAI). With a strong focus on leveraging cutting-edge AI technologies to drive innovation, Nuthan is passionate about optimizing workflows, enhancing productivity, and solving complex challenges in enterprise environments. Through expertise in AI solutions, Nuthan strives to unlock new opportunities while maintaining the highest standards of data security and privacy.
SSD Systems Architect - DMTS
Micron Technology
Suresh Rajgopal is a storage technologist working on Enterprise SSD system architecture and storage deployment of AI solutions. He has been with Micron Technology since 2010, working in areas of Storage Systems for AI, SSD systems architecture, advanced power and packaging technology and ASIC development of flash controllers, for client, enterprise and managed NAND products.
Senior PM
Microsoft
Shruti Sethi is a Zealous professional having a deep experience in both computing and storage systems. She has 12+ years industry experience working extensively on Graphics power management, workload management, setting performance targets and Data Center storage hardware. She is currently most vested into End-to-End Cost Optimized Storage, Efficient Storage Management techniques, Pricing for Storage Services and simultaneously driving Sustainability in Storage Solutions. Shruti is a part of the strategy product team driving the next wave of initiatives in AZURE STORAGE. She is also the Steering Committee Representative of Open Compute Project's Sustainability Projects and strives to push industry Sustainability work. Shruti has a Master of Science in Computer Architecture from Georgia Institute of technology and an MBA from University of California, Berkeley (Haas School of Business).
Software Engineer
Microsoft
Meetakshi Setiya is a software engineer on the Azure Files team at Microsoft - contributing to the Azure SMB Server and the Linux SMB Client. She has also been working on performance analysis and diagnostics via eBPF-based tooling.
Director of Leadership Narrative and Evangelist
Solidigm
Scott Shadley is the Director of Leadership Narrative and Evangelist at Solidigm focusing on efforts to drive adoption of new storage technologies and highlight the Solidigm leadership position within the market. Scott is also a 3rd term BoD member of SNIA. Scott is driving technology and fact-based content and communication to showcase the innovative work in storage-based AI, high-capacity SSD for AI, new market developments like computational storage, and security futures like post quantum cryptography. Over his 29 years in the semiconductor and storage space, Scott’s work knowledge includes all forms of semiconductor manufacturing. Recent career focus has been in strategic marketing and customer-focused roles driving current and new product introduction, acceptance, and deployment. He participates in several additional industry efforts including the Open Compute Project (OCP), Linux Foundation, DMTF, and NVM Express. He has industry experience at Micron, STEC, and NGD Systems.
VP Business Development
ZeroPoint Technologies
Nilesh Shah is VP Business Development, ZeroPoint Technologies. Additionally. He participates and contributes regularly at standards bodies like SNIA, OCP, JEDEC, RISC-V, CXL Consortium. He is regularly invited to speak at Conferences, and has led multiple panels and featured in Analyst/ Press interviews, focused on AI and memory technologies. Previously, Nilesh led Strategic Planning at Intel Corporation's Non Volatile Memory Solutions Group, where he was was responsible for the product planning and launch of the Data Center SSD products and Pathfinding innovations. Nilesh advises several startups in the AI Data Center, memory and GPU space
Scientist
Huawei Technologies Canada Co., Ltd.
David Slik is a data storage researcher at the Huawei Canadian Research Institute. Before working at Huawei, he was a Technical Director at NetApp and a co-founder of Bycast, where he led the development of StorageGRID. He has 25+ years of experience in the design, development and productization of high-performance distributed storage systems, resulting in over 90 granted patents. David is an author of two ISO/IEC standards, a contributor to five other storage industry standards organizations, and the chair of the Cloud Storage Technical Working Group at SNIA.
Founder and CEO
MEXT
Gary Smerdon is the CEO and founder of MEXT. Before MEXT, Gary served as CEO at TidalScale and held numerous leadership positions including at Fusion-io, LSI, and AMD. He is a recognized innovator having led key efforts around industry transitions in networking, storage, and computing.
CEO
Intersect360 Research
Addison Snell is a veteran of the High Performance Computing industry and the co-founder and CEO of Intersect360 Research, delivering data and insights covering the HPC-AI market and coordinating the HPC-AI Leadership Organization (HALO). He launched his company in 2007 as Tabor Research, a division of Tabor Communications. He brought the company independent in 2009 as Intersect360 Research together with his partner, Christopher Willard, Ph.D. Under his leadership, Intersect360 Research has become a premier source of market information, analysis, and consulting for the high-performance computing (HPC) and artificial intelligence (AI). Addison is a frequent keynote speaker and panel moderator at industry events, has testified before the U.S.-China Economic & Security Review Commission Congressional Subcommittee, and was named one of 2010’s “People to Watch” by HPCwire. Prior to Intersect360 Research, Addison was an HPC industry analyst for IDC. Addison originally gained industry recognition as a marketing leader and spokesperson for SGI’s supercomputing products and strategy. Addison holds a master’s degree from the Kellogg School of Management at Northwestern University and a bachelor’s degree in Mathematics from the University of Pennsylvania. Addison is a competent bridge player, an excellent Scrabble player, and a puzzle and game enthusiast, particularly word puzzles. In 2022 he achieved a life “bucket list” goal of constructing crosswords for the New York Times.
Distinguished Engineer
SanDisk
Steven Sprouse has been with SanDisk for 20 years, focusing on systems architecture, performance analysis, and algorithms for NAND flash management. Prior to joining SanDisk, Steven worked at Sun Microsystems and PMC-Sierra.
Hardware Systems Engineer
Meta
Ross Stenfort is a Hardware System Engineer at Meta delivering scalable storage solutions. He has been involved in the development of storage systems, SSDs, ROCs, HBAs and HDDs with many successful products and over 40 patents. Some of his industry and ecosystem activities include being OCP Storage Co-Lead and a NVM Express board member.
Strategist
Seagate Technology
Curtis Stevens (Strategist, Seagate Technology) has been working in the storage industry for over 35 years with experience in host side drivers, HBA design, Hard disk drives, SSD’s, SAS/SATA/USB/1394/etc. Curtis is the technical editor for standards and specifications in INCITS T10, INCITS T13, SATA-IO, USB-IF, NVMe, and others. Curtis has helped invent and standardize technologies in the areas of Bootable CD-ROM, PATA-SATA bridges, USB Printers, USB Mass Storage, translating SAS to SATA, 4K/512e sector sizes, NVMe Zoned Name Spaces, and most recently, Drive Regeneration/depopulation & Translating SAS to NVMe.
Director of Market Development
Solidigm
Ace Stryker is the director of market development at Solidigm, a California-based maker of SSDs, where he focuses on emerging AI technologies and the value of storage. He previously worked at Intel. He has an MBA from Cornell University and is based in the Sacramento area. In 2006, he was named the TIME Magazine person of the year.
Associate Engineer
Samsung
Anisa Su joined the Global Open eco-System Team within the memory division of Samsung as a software engineer after graduating from the University of Washington with a B.S. in Computer Science in 2024. She is interested in building expertise in systems software/memory management.
Principal Engineer, SSD Standards
--
Security in Storage Working Group Chair
--
Security in Storage Working Group Chair
KIOXIA
--
IEEE
--
IEEE
Paul Suhler has been active in the data storage world for thirty years, working for companies which include KIOXIA, Micron, WD/HGST, and Quantum. He is a software and firmware engineer, and has managed the development of storage devices for companies such as Quantum and Adaptec. He is the chair of the IEEE Security in Storage Working Group, and has contributed to standards developed by organizations such as NVM Express, SNIA, and the INCITS SCSI (T10) and Fibre Channel (T13) committees. He served as the Deputy Director of the USC Advanced Computer Architecture Laboratory, and commanded US Army combat engineer companies in Korea and California. He holds a PhD in computer engineering from the University of Texas at Austin. He is a Life Senior Member of IEEE and a member of ACM.
Principal Research Scientist
IBM
Vasily Tarasov is a Principal Research Scientist at IBM. His research and engineering interests revolve around data storage, focusing on high-performance storage systems for Hybrid Clouds and AI. At IBM Vasily led research projects on making IBM Spectrum Scale (GPFS) container-native, building a storage acceleration tier for AI workloads, and creating high-performance object store for data lakehouse. Most recently Vasily works on building and operating high-performance storage solutions for IBM's Vela supercomputer for AI. In the past, Vasily studied data deduplication, storage performance and workload analysis, user-space file systems, and storage for containers. Vasily holds Ph.D. degree in Computer Science from Stony Brook University, published dozens of papers in systems conferences, and regularly serves on program committees of top-tier storage conferences.
Senior Director Engineering
Keysight Technologies
Cliff Tavares is the Sr Director of platform engineering for networking and security products at Keysight technologies. He has more than 2 decades of experience in AI infrastructure, Data Center networking, Cybersecurity, O-RAN front-haul, and Timing Sensitive Networks - helping vendors test and navigate complex performance and interoperability of multi-Terabit scale networks. Cliff is the Co-Chair of the UEC Compliance and Test Working Group. He has been a representative and contributor to several standards bodies including the Berkeley wireless research center [BWRC], SONiC, IEEE 802.11WNG/11n/11e and the 5G O-RAN Alliance. Cliff holds an MS in Computer Engineering from Birla Institute of Technology and Science, Pilani, and MBA from USC. Cliff holds 18 patents, is widely published.
Senior Staff Software Engineer
Google
Jeff Terrace is a Senior Staff Software Engineer at Google, where he has worked on Google Cloud Storage for the past 12 years. He is a tech lead for GCS's Serving Frontend team, which maintains GCS's XML compatibility API. Prior to coming to Google, he earned his PhD in Computer Science from Princeton University where he studied distributed systems. He currently lives and works from his home in Massachusetts.
Member of Technical Staff
Pure Storage
Riley has been building high-performance data paths at Pure Storage for over a decade. He spent several years leading the performance team for Pure's flagship enterprise products, driving quality and efficiency for a $1B+ revenue stream. More recently, as a founding engineer and architect at Pure's Hyperscale Line of Business, he is building flash storage solutions for the largest applications in the world.
SMTS, Storage Solutions Architect
Micron Technology
Wes Vaske is a seasoned Storage Solutions Architect with over 15 years of experience in data center storage systems, currently focused on high-performance NVMe solutions optimized for AI workloads. At Micron Technology, Wes plays a pivotal role in shaping next-generation storage architectures that meet the demanding performance and efficiency needs of AI-driven data centers. He is a lead contributor to the MLPerf Storage Working Group, where he helps define industry benchmarks for AI storage performance. Wes has been instrumental in developing automation frameworks for workload execution and system observation, enabling reproducible and insightful performance analysis across diverse environments. Prior to his current role, Wes led the Data Center Workloads Engineering team for a decade, where he pioneered system observation, tracing, and analysis tools that have become foundational to Micron’s workload-first product development strategy. His earlier career includes performance engineering for Oracle RAC database systems at Dell Technologies. Wes holds a B.S. in Physics from Iowa State University and continues to drive innovation at the intersection of storage, AI, and systems performance.
Retired
Self
40+ year veteran with most of that time focused on flash memory component and SSD design. He holds 65+ patents covering flash memory and security. He is currently retired and enjoying contributing time and energy to the industry he's spent his entire adult life developing.
Computer Scientist
Argonne National Laboratory
Huihuo Zheng is a Computer Scientist in the AI/ML group at Argonne National Laboratory. His research focuses on high-performance data management, parallel I/O, and large-scale distributed training for deep learning and large language models. He applies these techniques to advance domain sciences such as physics, chemistry, and material sciences. As the co-lead of the MLPerf Storage Working Group, Huihuo plays a key role in developing benchmark suites to evaluate storage system performance for demanding AI applications.
SW Architect
VAST Data
I'm the protocols architect at VAST data for almost 8 years. I'm working on the wire protocols (NFS, SMB, S3), permission management, user management, multi tenancy, multi-protocol consideration and auditing. I also designed and implemented large portions of protocols code in VAST. Prior to VAST, I server as a storage architect in Velostrata (acquired by Google) for 2.5 years where I was involved in moving VMs to the public cloud and serving I/O over iSCSI. Prior to that, I spent 7 years in Kaminario as a storage developer. I was also involved in open-source projects: open-iscsi, Infiniband and SCST.