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SNIA Developer Conference September 15-17, 2025 | Santa Clara, CA

Principal Engineer

Intel

Yadong Li is a Principal Engineer and leads the overall Software Architecture for the high performance SmartNIC/IPU programs in the Ethernet Products Group at Intel.  Yadong is also a storage architect with an ongoing focus on NVMe-oF and Cloud storage technologies and architectures in the SmartNIC/IPU products. Yadong holds 11 patents granted on Ethernet Controller design and several pending. Yadong earned two master’s degrees, one in Computer Science from Wright State University and one in Information and Signal Processing from Beijing University of Posts and Telecommunications. 

400G for AI and Storage: Faster is Always Better

Submitted by Anonymous (not verified) on

This presentation will show how AI and storage interconnects can support 400Gbps lane speeds. Feasibility of copper cabling across intra and inter rack interconnects will be supported using Active Copper Cables (ACC). Channel models, including co-packaged copper, flyover cables, backplane connectors, backplane cables and front panel pluggable modules will be shown and analyzed for 400G performance. 

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