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SNIA Developer Conference September 15-17, 2025 | Santa Clara, CA

VP Business Development

ZeroPoint Technologies

Nilesh Shah is VP Business Development, ZeroPoint Technologies. Additionally. He participates and contributes regularly at standards bodies like SNIA, OCP, JEDEC, RISC-V, CXL Consortium. He is regularly invited to speak at Conferences, and has led multiple panels and featured in Analyst/ Press interviews, focused on AI and memory technologies. Previously, Nilesh led Strategic Planning at Intel Corporation's Non Volatile Memory Solutions Group, where he was was responsible for the product planning and launch of the Data Center SSD products and Pathfinding innovations. Nilesh advises several startups in the AI Data Center, memory and GPU space

Disrupting the GPU Hegemony: Can Smart Memory and Storage Redefine AI Infrastructure

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AI infrastructure is dominated by GPUs — but should it be? As foundational model inference scales, performance bottlenecks are shifting away from compute and toward memory and I/O. HBM sits underutilized, KVCache explodes, and model transfer times dominate pipeline latency. Meanwhile, compression, CXL fabrics, computational memory, and SmartNIC-enabled storage are emerging as powerful levers to close the tokens-per-second-per-watt gap.

Grokking Lossless Data Compression

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Emerging Deep Learning/ Machine learning and cloud native Applications at data center scale demand terabytes of data flowing across the storage/ memory hierarchy, straining interconnect bandwidth and component capacities. The Industry has responded with a wide range of solutions like process node shrink, higher capacity devices, new tiers, innovative form factors, new interconnect technologies and fabrics, new types of compute architectures, new algorithms and more to creatively leverage storage/memory tiering.

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