HDD Computational Storage Benchmarking
Salon IV
Wed Sep 14 | 8:30am
Abstract
This presentation looks at a computational storage use-case within the Human Cell Atlas genomics research and discovers that the deployed HW CS engine is insufficient and why this is the case. The presentation shows the journey from standard system bench marking to micro-benchmarking specifically instruction per cycle analysis (IPC). This presentation also details the programming techniques used along the way, including intrinsic SIMD and inline assembler programming.
Learning Objectives
- Learn to use IPC as a technique for understanding key HW differences
- Learn how to use to use inline assembler to get fine grain control of performance bechmarking
- Learn about intrinsic SIMD programming
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