SNIA Developer Conference September 15-17, 2025 | Santa Clara, CA
Winchester
Wed Sep 18 | 2:30pm
Big changes lie ahead for the world of data processing in many areas: hardware structure, data management, processing algorithms, and even computing types (analog vs. digital.) How must the technical community prepare for these changes? Join noted analyst Jim Handy and IEEE President Tom Coughlin as they look at future computing systems in which storage will appear in new and interesting places. This session will examine how CXL might make persistent memory more widely available and bring processing closer to memory, while AI will drive both the broad adoption of new types of volatile DRAM in HBM stacks as well as the use of emerging nonvolatile technologies in AI-specific “Processing in Memory” (PIM) chips and embedded products for consumer and industrial applications. We’ll also show why computing is poised to convert to persistent caches, and eventually persistent register sets, either as memory on the processor chip or as chiplets, even though the DRAM that lies between persistent storage and persistent caches will remain volatile. We’ll touch on the evolution of “AI Everywhere” and show how altogether different approaches will be used for various applications, from neural networks at the edge and computational storage close to the source of the data, to massive centralized data centers that boast tens of thousands of GPUs, all the while explaining what architectures, software, and new algorithms will be needed to support this shift. These changes will require the development of new approaches to computing that will disrupt the fundamental direction of computing architecture.
Discover how persistence will find its way into new levels of the memory/storage hierarchy
Understand the challenges presented by mixed persistent and volatile memory levels
See how emerging memory technologies will create new AI platform architectures
NVMe-over-Fabrics (NVMe-oF) offers DH-HMAC-CHAP as its in-band method for authenticating hosts and subsystems. To enhance authentication capabilities, the specification recently introduced the Authentication Verification Entity (AVE) – a logical entity designed to manage and verify the authentication process. AVE enables centralized or semi-centralized authentication, simplifying the management of authentication keys and improving security in large fabrics deployments.
However, the specification lacks comprehensive guidelines on implementing authentication mechanisms, particularly in determining when to use single versus multiple authentication keys. This ambiguity existed before AVE and still persists after its addition. The absence of clear recommendations poses challenges for implementers, especially in managing security risks, key isolation, and scalability.
In this talk, we address these gaps by discussing all the recommendations that we identified in the NVMe specification and the open-source ecosystem during our product development.
As SSD capacities increase beyond 16TB, the time to randomly precondition these drives has also increased from several hours to several days. Traditional methods involve a sequential write followed by multiple random writes to reach a steady state. We present Sprandom (SanDisk Pseudo Random) – a novel approach to random preconditioning that uses the Flexible I/O Tester (fio) to achieve near steady-state performance with just a single physical drive write. Our experiments show that using the Sprandom method, the random preconditioning time of large (> 64TB) drives can be reduced from days to hours.
This presentation explains how an NVMe™ PCIe SSD supporting multiple NVMe controllers can be used to create and migrate virtual NVMe SSDs (i.e., Exported NVM Subsystems). The commands used by a host managing these virtual SSDs are fully illustrated using animation and demonstrates the interoperability between different SSD vendors during migration. Come and see how the virtual NVMe SSD is abstracted from the underlying NVMe SSD for the migrating Virtual Machine.