SNIA Developer Conference September 15-17, 2025 | Santa Clara, CA
Abstract
As applications continue to increase in complexity and users demand more from their workloads, there is a trend to again deploy dedicated accelerator chips to assist or offload the main CPU. These new accelerators (xPUs) have multiple names such as SmartNIC, DPU, IPU, APU, NAPU. How are these different than GPU, TPU, CPU? xPUs accelerate and offload functions including math, networking, storage, cryptography, security, and management. This webcast will cover key topics about, and clarify questions surrounding, xPUs.