Many businesses like ours are challenged with on-demand infrastructure provisioning at the speed of software while the datacenter footprint is diminishing. Pure Storage as a company is getting out of the datacenter center business and are adopting more of a OpEx cost model with strict legal and data compliance guidelines for many of our business application pipelines. We chose to go with a programmable Infrastructure and Connected Cloud architecture with open APIs.

Presenting paravirtualized devices to virtual machines has historically required specialized drivers to be present in the guest operating system. The most popular example is virtio-blk or virtio-scsi. These devices can be constructed using either the host system operating system (KVM, for example, can emulate virtio-blk and virtio-scsi devices for use by the guest) or by a separate user-space process (the vhost-user protocol can connect to these targets, typically provided by SPDK). However, only Linux currently ships with virtio-blk and virtio-scsi drivers built-in.

Data centers are under pressure. Competing needs for asset homogenization, supporting specialized workloads and delivering predictable performance lead to deployment tradeoffs that drive down data center utilization and drive up costs. Businesses need to continue to innovate, but budgets rarely reflect as such. A "one Cloud fits all" is expensive or simply does not work, but the same flexibility of the Cloud is essential as workloads repatriate to containers on bare metal.

Traditional Storage Node consists of Compute, Networking and Storage elements. In this case, the entire node is a single failure domain and as such both data and meta data are maintained in storage. Emergence of CXL allows us to re-think the traditional storage node architecture. In future, the storage (behind CXL IO) and metadata memory (behind a CXL memory) can be disaggregated locally or across a bunch of storage nodes to improve the availability of the data. Further, memory persistence can be achieved at a granular level using CXL memory devices.