Ransomware attack mitigation has been a high profile problem and is getting more visibility in recent years due to the high payback from victims to have their data released. This proposal implements a series of ‘recognition’ triggers within a layered file system on Windows, which forces a caller through a form of 2FA to potentially reduce the impact of the attack. The approach taken by Thales, within the layered file system implementation for data protection, leverages several layers to recognize when a potential threat is executing.

Emergence of serial-attached protocols like CXL and OpenCAPI. It is possible to connect DRAM based devices in the same physical slot as NAND Flash SSD. This paper discusses which pieces of existing NVMe SSD standards, like Mechanical form-factors, management interface protocols, power mode and Thermal profiles, can be reused for DRAM based CXL Memory devices. This will not only save cost, but also accelerate the adoption because you can reuse existing software eco-system and extend it for managing any type of device, whether storage or memory.

Fast, scalable parallel file system performance is a key enabler of massively parallel computing as well as of emerging big data and machine learning applications. Released almost two decades ago, Lustre has long been the storage solution of choice for many supercomputing data centers. But as the world slowly retire rotational disks in favor of fast SSDs and persistent memory for their performance tiers, Lustre is becoming increasingly unable to fully utilize available storage bandwidth due to its old, disk-oriented object storage server designs based on Ext4 derived ldiskfs.

The Quantum computing paradigm shift has changed the way we look at data security these days, especially the long-term security of data. Soon, the fast algorithms will be designed to run on quantum computers which can break some of the most widely used cryptosystems, making them vulnerable. However, to address this issue, Chaos theory is actively being studied as a basis for post-quantum era cryptosystems and advancement has been made in the domain of study. The unique characteristic of chaotic systems can be leveraged to produce highly secure cryptographic systems.

This presentation will discuss Optimal Performance Parameters (OPTPERF and OPTRPERF) found in NVM Express® (NVMe) Section 5.8.2 of NVM Command Set Specification. Every performance parameter (NPWG, NPWA, NPDG, NPDA, NOWS, NPRG, NPRA, NORS) has several choices on setting values by SSD manufacturers. In this presentation, the differences intended for some of the parameters (Ex: NPWG vs NOWS) will be highlighted. Sometimes the parameters may be set by either NAND or SSD Controller attributes.

Capacity requirements and power consumption are becoming increasingly challenging for hyperscale deployments. Technology standards bodies have been developing specific features within Serial Attached SCSI (SAS) to address these problems and offer developers real solutions. This presentation will address multiple emerging features within SAS, the technology around these features, and how they will help developers optimize their current storage infrastructure.

Computational storage in general can bring unique benefits in increasing the efficiency of CPU utilization in a data processing system. In this presentation we discuss the benefits of leveraging computational storage for offloading compute intensive tasks of object storage applications in a disaggregated storage environment. We demonstrate the ability of the solution to complement the CPU by taking away tasks that benefit from in-situ processing within the storage, thereby improving the overall system performance while lowering the TCO.

Local disk emulation using domain-specific hardware poses a great opportunity for innovation in the storage domain. Standard host-side drivers like NVMe or virtio-blk and legacy applications can be enabled to access disaggregated storage at scale using state-of-art protocols like NVMe-oTCP while increasing performance through offload of storage services to the hardware (SmartNIC/DPU/IPU/xPU).

With CXL, system software, system hardware, and applications software developers will soon be presented with opportunities to disaggregate and pool memory into a memory-as-a-service for multiple computing hosts. In this session, Charles Fan will describe the architecture of such a system, including both services transparent to the applications and APIs that allow deeper integration. The components that will be covered include (1) host-based transparent memory tiering; (2) fabric management that allows dynamic provisioning and sharing; (3) advanced data services.

There is a demand for Hierarchical memory as use cases demand higher amounts of memory capacity and bandwidth as AI/ML, database applications scale up and scale out. Software-Defined Memory (SDM) is an emerging HW-SW co-design architecture paradigm that provides software abstraction between applications and underlying memory resources with dynamic memory provisioning to achieve the desired SLA. With emergence of newer memory technologies and faster interconnects, it is possible to optimize memory resources deployed in cloud infrastructure while achieving best possible TCO.