PM+CS Summit 2022 Speakers

Harikrishnan B, Scientist E, CDAC

Harikrishnan works as Scientist E  at Centre for Development of Advanced Computing (CDAC), Thiruvananthapuram, India and has more than 15 years of experience in design, development and Implementation of FPGA , SoC,  Microcontroller  and Processor-based embedded systems. He is experienced in the design of storage systems, NDT systems,  defence equipments, data acquisition systems, cyber forensic systems, and more.

Sudhir Balasubramanian, Senior Staff Solution Architect and Global Oracle Practice Lead, VMware

Sudhir has been at VMware since 2012  as Senior Staff Solution Architect & Global Oracle Practice Lead. He has 27+ years Oracle hands-on experience.  His roles have included: Principal Oracle DBA / Architect, Oracle RAC/Data Guard Expert, experienced in  EMC SAN Technologies, Principal Oracle DBA/Oracle Architect (1995 – 2011) [Tata Consultancy Services (TCS), Sony Electronics, Newgen Results (Aspen) ,Teletech Corp, SAIC, Active Network, Sempra Energy Holdings]; VMware VCA – Cloud ,VMware vBCA Specialist, VMware vExpert; Member of the Office of the Chief Technical Ambassador VMware (Alumni); Oracle ACE.  He is the aeading author of “Virtualizing Oracle Business Critical Databases on VMware SDDC”.  Sudhir is a recognized Speaker at  Oracle Open World, IOUG, VMworld, VMware Partner Exchange, EMC World, EMC Oracle Summit and Webinars.

Stephen Bates, CTO, Eideticom

Stephen Bates is CTO at Eideticom, a developer of leading edge storage, compute, and applications for programmable platforms in the cloud or at the network edge. He focuses on applying emerging technologies such as NVMe, RDMA, new non-volatile memories, and advanced programmable logic to create complex storage and communications systems. He has combined several such technologies to implement computational storage that offers performance well above today’s production systems. He is also an active contributor to the Linux kernel. Before joining Eideticom, he worked in the CTO office at PMC-Sierra and was a professor of computer engineering at the University of Alberta. He holds a PhD in signal processing from the University of Edinburgh, Scotland. He has given presentations at Storage Developer Conference and at past Flash Memory Summits.

Alan Benjamin, Member CXL Consortium/President and CEO, GigaIO
Alan is one of the visionaries behind GigaIO’s innovative solution. He was most recently COO of Pulse Electronics – $800M communication components and subsystem supplier and previously CEO of Excelsus Technologies. Earlier he helped lead PDP, a true start-up, to a successful acquisition by a strategic buyer for $80M in year three. He started his career at Hewlett-Packard in Sales Support and quickly moved into management positions in Product Marketing and R&D. Alan graduated from Duke University with a BSEE in Electrical Engineering and attended Harvard Business School AMP program, as well as UCSD LAMP program.

Daniel Byrne, Cloud Software Engineer, Intel Corporation

Daniel is a cloud software engineer at Intel and working on his PhD at Michigan Tech University. His work focuses on modeling, memory optimization, and improving performance of multi-level key-value caches.

Tom Coughlin, President, Coughlin Associates

Tom Coughlin, President, Coughlin Associates is a digital storage analyst and business and technology consultant.  He has over 37 years in the data storage industry with engineering and management positions at several companies.  Coughlin Associates consults, publishes books and market and technology reports (including The Media and Entertainment Storage Report), and puts on digital storage-oriented events.  He is a regular storage and memory contributor for and M&E organization websites.  He is an IEEE Fellow, President of IEEE-USA and is active with SNIA and SMPTE. For more information on Tom Coughlin and his publications and activities go to

Rob Davis, Vice President of Storage Technology, NVIDIA

Rob Davis is Vice President of Storage Technology at NVIDIA where he focuses on ways to apply their high-speed interfaces (such as 40G and 100G) to storage systems. Over the last two years he has moved NVIDIA into a leadership position in NVMe over Fabrics. As a technology leader and visionary for over 35 years, he has been a key figure in the development of an entire generation of storage networking products. Davis was previously VP/CTO at QLogic, where he drove development and marketing of Fibre Channel, Ethernet, and InfiniBand technology into new markets such as blade servers. Before joining QLogic, Davis worked at Ancor Communications, where he drove development and marketing of Fibre Channel and InfiniBand products. Davis’ areas of expertise include virtualization, Fibre Channel, InfiniBand, RoCE (remote DMA over converged Ethernet), and NVMe.

Tom Coughlin Dave Eggleston, Principal of Intuitive Cognition Consulting

Dave Eggleston is the owner and Principal of Intuitive Cognition Consulting, and he provides strategy and business development services to leading NVM and Storage clients. Dave’s extensive background in Flash, MRAM, RRAM, and Storage is built on 30+ years of industry experience serving as VP of Embedded Memory at GLOBALFOUNDRIES, CEO of RRAM pioneer start-up Unity Semiconductor (acquired by Rambus), Director of Flash Systems Engineering at Micron, NVM Product Engineering manager at SanDisk, and NVM Engineer at AMD. Dave is frequently invited as a speaker at international conferences as an expert on emerging NVM technologies and their applications. He holds a BSEE degree from Duke University, a MSEE degree from Santa Clara University, and 25+ NVM related granted patents.

Dr. Charles Fan, CEO and Founder, MemVerge

Charles Fan is co-founder and CEO of MemVerge. Prior to MemVerge, Charles was the CTO of Cheetah Mobile leading its global technology teams, and an SVP/GM at VMware, founding the storage business unit that developed the Virtual SAN product. Charles also worked at EMC and was the founder of the EMC China R&D Center. Charles joined EMC via the acquisition of Rainfinity, where he was a co-founder and CTO. Charles received his Ph.D. and M.S. in Electrical Engineering from the California Institute of Technology, and his B.E. in Electrical Engineering from the Cooper Union.

Jerome Gaysse, Sr. Technology and Market Analyst, Silinnov Consulting

Jerome Gaysse is senior technology and market analyst at Silinnov Consulting, a consultancy based on emerging data storage technologies. He also drives the Cloud services offering at SPIE ICS, a leading IT French company.He has strong technical expertise in IP, NVM, FPGAs, and ASICs for the data center market. He successfully worked with major corporate companies, startups, and research institutes in both Europe and the USA. He is a regular presenter at international conferences such as those sponsored by IEEE and SNIA, as well as past Flash Memory Summits. Jerome earned an MSEE from the National Institute of Applied Sciences (INSA) in Lyon (France) with a semiconductor specialty.


Alessandro Goncalves, Cloud Solution Architect, Intel Corporation

Alessandro Goncalves is a Cloud Solutions Architect at INTEL Corp. He has worked the last 5 years in the  Optane Group, helping shaping Memory environment for Optane Persistent Memory and Memory Tiering ecosystem. He works with cloud providers and enterprise customers to enable use cases for Optane PMEM.

Gary Grider, HPC Division Leader, Los Alamos National Laboratory

Gary Grider is the Leader of the High Performance Computing (HPC) Division at Los Alamos National Laboratory.  Los Alamos’ HPC Division operates one of the largest supercomputing centers in the world focused on US National Security for the US/DOE National Nuclear Security Administration. As Division Leader, Gary is responsible for all aspects of High Performance Computing research, technologies development, and deployment at Los Alamos.  Gary has 30 granted patents and over 13 pending in the data storage area and has been working in HPC and HPC related storage since 1984.

Pekon Gupta, Solutions Architect, SMART Modular Technologies

Pekon Gupta is working as a Solutions Architect at SMART Modular Technologies. He has more than 16 years of experience in hardware systems ranging from silicon design, board and system bring-up, and developing Linux kernel drivers for embedded systems. He is currently involved in Memory (DRAM) and Storage products supporting new standards like CXL and NVMe 2.0. His areas of interest include enabling open-source framework for Storage and Networking accelerators. Prior to joining SMART Modular, Pekon was working at Intel, Esencia Tech, Sandisk, Texas Instruments, and Freescale.

Charles Fan Jim Handy, General Director, Objective Analysis

Jim Handy of Objective Analysis has over 35 years in the electronics industry including 20 years as a leading semiconductor and SSD industry analyst. Early in his career he held marketing and design positions at leading semiconductor suppliers including Intel, National Semiconductor, and Infineon. A frequent presenter at trade shows, Mr. Handy is known for his technical depth, accurate forecasts, widespread industry presence and volume of publication. He has written hundreds of market reports, articles for trade journals, and white papers, and is frequently interviewed and quoted in the electronics trade press and other media. He posts blogs at and

Jim Handy Shyam Iyer, Chair, SNIA SDXI Technical Work Group; Distinguished Engineer, Dell

Shyam Iyer is the Chair for SDXI (Smart Data Acceleration Interface), a newly formed SNIA TWG, which aims to develop, extend and drive an extensible, virtualizable, forward-compatible, memory to memory data movement and acceleration interface standard. He is a Distinguished Engineer in Dell's Office of CTO for Servers with many years of experience researching, designing, developing, debugging, validating, leading and driving system and software solutions that have an industry wide impact.

Arvind Jagannath, Product Line Manager for vSphere Platform, VMware

Arvind Jagannath works in Product Management at VMware. With over 25 years of experience in the industry working on networking, storage, embedded, and kernel development, he currently leads infrastructure and core platform enablement for vSphere, working across the VMware ecosystem of server, IO, and storage partners. Arvind most recently drove platform product management at Cohesity and NetApp. Arvind holds an MBA from the University of Chicago, Booth school of Business and a Bachelors in Computer Science and Engineering from India.

Mythri K, Senior Staff Engineer, Samsung 

Mythri K is a Senior Staff Engineer with Samsung.  She has10 years of experience in qualifying storage products, and is involved in debugging failure occurred during the testing phase of product qualification. She is also involved in performance benchmarking and compliance testing of storage products.

Ramdas Kachare, Sr Director, System Architecture, MSL, Samsung Semiconductor Inc

Ramdas Kachare is Sr Director at Memory Solutions Lab (MSL), Samsung, leading Data Center Device Solutions (DCDS) group for FPGA, Firmware and host software development. He joined Samsung in 2016 and leads various projects in SSD technologies such as Ethernet SSD, Computational Storage, storage virtualization, and data-at-rest security. Prior to Samsung he worked on PCIe/SAS/SATA based SSD Controller ASIC/SoC and IP development. Before joining storage industry, Ramdas worked in data networking industry developing ASIC based TCP/IP switches, routers, NIC, and optical networking technologies. Ramdas holds BS CS degree from WCE Sangli, and MS CS from VJTI, Bombay.

Sudarsun Kannan, Assistant Professor, Rutgers University

Sudarsun is an Assistant Professor at Rutgers University, where he leads the Rutgers Systems Lab. His research group works at the intersection of hardware and software, building operating systems and system software for next-generation memory and storage technologies. Results from his work have appeared at premier operating systems and architecture venues, including OSDI, SOSP, FAST, ASPLOS, EuroSys, ISCA, HPCA, SPAA, and others. Sudarsun's work has also resulted in three patents related to nonvolatile memory and resource management. Before joining Rutgers, he was a postdoctoral research associate at Wisconsin-Madison and graduated with an M.S. and Ph.D. from Georgia Tech. Sudarsun also serves as the co-chair for the prestigious HotStorage '22 workshop.

Dr. Yang Seok Ki, Vice President and CTO of Memory Solutions Lab, Samsung Semiconductor

Dr. Yang Seok Ki is Vice President and CTO of Memory Solutions Lab (MSL) at Samsung Semiconductor Inc. in San Jose, California. Since joining Samsung 2011, he has led in-storage computing projects including smart SSD and key-value SSD, and led the NVMe key-value standard, SNIA key-value API, and SNIA compute storage API at Samsung. He is also leading multiple CXL (Compute Express Link) initiatives. He is also a member of the Open Computing Project (OCP) Future Technology Initiative (FTI). Prior to joining Samsung, he worked in Oracle's Server Technology Group. Prior to his industrial career, he was involved in high performance computing (HPC), grid, and cloud research at the Institute of Information Sciences at the University of Southern California and the Center for Networked Systems at the University of California, San Diego. He received his Ph.D., Master's and Bachelor's degrees in Electrical Engineering and Computer Engineering from Seoul National University, and completed the Engineering Leadership Professional Program (ELPP) at University of California, Berkeley.

Jinpyo Kim, Senior Staff Engineer, VMware

Jinpyo Kim is a senior staff engineer working at the office of CIBG CTO at VMware. He recently focused on a few advanced development projects including accelerating ESXi storage stack/vSAN with hardware accelerators and SmartNIC. He finished a Ph.D. in Computer Science at the University of Minnesota-Twin Cities.

KIm Malone, Storage Software Architect, Intel Corporation

Kim is a storage software architect at Intel Corporation, and has over 20 years of industry experience developing software for distributed high availability clustered systems for storage and networking products. Kim is engaged with computational storage standards initiatives with SNIA and NVMe, and is Co-Chair of the NVMe Computational Storage Task Group.

Srija Malyala, Software Developer, Advanced Micro Devices, Inc.

 Srija is a Software Developer at AMD Data Center Group. She has close to 4 years of experience in storage and networking domain. She worked on technologies like NVMeOF, RDMA, Storage Acceleration, Encryption and on Computational Storage Device called SmartSSD. Srija has a bachelor's degree from BITS Pilani.

William Martin, SNIA Technical Council Co-Chair/Principal Engineer, SSD IO Standards, Samsung Semiconductor

Bill has been involved in the storage industry for over 35 years serving on industry consortiums and standards bodies for storage including SNIA, INCITS T10, INCITS T13, INCITS T11, SATA-IO, and NVMe. In addition to his role representing Samsung in SSD IO Standards, Bill currently holds the following industry leadership roles: co-chair of the SNIA Technical Council, Chair SNIA CMSI, Board member of the NVMe Board of Directors, Chair of INCITS T10, and Secretary of INCITS T13.

Bill is: editor of the SNIA Computational Storage Architecture Model; editor of the SNIA Computational Storage API; editor of the SNIA Key Value Storage API; editor of SCSI Block Commands – 5 (SBC-5); and author of numerous proposals to: NVMe, SNIA, INCITS T10, INCITS T13, and INCITS T11. He has received numerous industry recognitions for his contributions to the storage industry over the past decades including: SNIA Volunteer of the Year award 2021, INCITS Gene Milligan award for effective committee management 2016, INCITS Merit award 2013, FCIA Achievement award 2010, INCITS Outstanding Leadership Team award 2007, INCITS Technical Excellence award 2005, FCIA Lifetime Achievement award 2005, and SNIA Outstanding Theme lead for the interop lab 2004.

David McIntyre, Director, Product Planning and Business Enablement, Samsung Corporation

David McIntyre focuses on computational storage acceleration solutions development and strategic business enablement for cloud to edge applications including AI inference/video analytics, database processing and blockchain networks. He has held senior management positions with IBM, Samsung, Xilinx, Intel (formerly Altera) and at Silicon Valley startups.  He has consulted for institutional investors including Fidelity, Goldman Sachs and UBS. David is a frequent presenter and chairperson at the Flash Memory Summit and other technical conferences including SNIA.


Michael Mesnier, Principal Engineer, Intel Labs

Mike Mesnier is a Principal Engineer in Intel Labs. He joined Intel in 1997 and has contributed to a variety of storage research projects - including Internet SCSI (iSCSI), Object-based Storage Devices (OSD), Relative Fitness Modeling, Differentiated Storage Services (storage QoS), Storage Analytics (ML for storage) and, most recently, Computational Storage. Mike received his PhD in Computer Engineering from Carnegie Mellon University.  In his free time, Mike enjoys sailing on the Columbia River in Portland, Oregon.

Jason Molgaard, Co-Chair, SNIA Computational Storage Technical Work Group/Principal Engineer Systems Design Strategy, AMD

Jason Molgaard is an experienced storage controller architect having worked for various storage device companies architecting and designing HDD and SSD storage controllers.  Having worked on a variety of controller interfaces, he focuses on optimizing performance, cost, and area of CPU subsystems.  Jason is also co-chair of the SNIA Computational Storage TWG and helps define the Computational Storage standard.  Jason holds a Master of Science degree in Electrical Engineering.

Amar Nagula, Senior Software Development Manager, Advanced Micro Devices, Inc.

Amar Nagula is a senior software development manager at AMD (earlier Xilinx) Data Center Group with over 20 years of experience in embedded systems, networking and storage technologies. He has worked on developing high performance NVMe SSD with massively parallel architecture, low latency and high throughput FPGA based NVMeOF Target systems and high speed RDMA NICs. At Xilinx, he also worked on creating one of the industry's first Computational Storage Devices called SmartSSD in collaboration with Samsung. Amar holds a Master's degree in Computer Science and Technology from Indian Institute of Technology, Roorkee, India.

Mats Öberg, Associate Vice President, DSP Architecture, Storage Office of the CTO, Marvell
Mats Öberg is Associate Vice President, DSP Architecture, Storage Office of the CTO at Marvell. He leads research and development of signal processing for SSDs and HDDs. He also is responsible for computational storage and storage-related machine learning. Since joining Marvell, Mats has been leading the development of read channels for perpendicular recording and TDMR, as well optical recording for DVD and Blu-ray. Mats earned his PhD in Electrical Engineering from University of California, San Diego.

Cheolmin Park, CVP, Samsung Semiconductor

Cheolmin Park has 17 years of experience in the semiconductor industry – most recently leading product planning for Samsung’s CXL memory program. He serves as Director of the CXL Consortium.

Chris Petersen, Hardware Systems Technologist, Meta

Chris Petersen is a Hardware Systems Technologist leading hardware technology and roadmaps at Meta. Chris has been designing and building servers, storage, and datacenter solutions for over 15 years. He has worked on a wide variety of architectures, including scale-up, scale-out, and accelerators. Chris is a board member of NVM Express, Inc, the organization that that developed the NVM Express specification for accessing SSDs on the PCIe bus. Additionally, he is a board member of Compute Express Link (CXL). He has evangelized both NVMe, storage, and accelerator solutions at multiple conferences, including the Open Compute Summit, Non-volatile Memories Workshop, and Flash Memory Summit. Before joining Meta, he held engineering positions at Dell and HP.

Oscar Pinto, Principal Software Architect, Samsung Semiconductor

Oscar Pinto is a Principal Software Architect in the Memory Solutions Lab at Samsung Semiconductor Inc, California. He is a key contributor to the SNIA CS API definitions and works with a variety of innovate storage technologies in the NVMe/NVMe-oF space. His interests include storage architecture and interfaces, disaggregated and distributed environments. Oscar’s current responsibilities are in leading software architecture for Computational Storage and has 20+ years of industry experience in Operating Systems, device drivers and hardware definitions. He holds 25+ issued patents and has contributed to NVMe, NVMe-oF and RDMA Infiniband definitions and solutions.

Somnath Roy, Principal Engineer, Samsung Semiconductor

Somnath Roy is a Principal Engineer at Samsung Semiconductor with more than 18 years of experience in different areas of the ever evolving storage stack. He also has several years of experience building and performance architecting private cloud solutions built upon distributed Object Storage. HIs accomplishments include multiple patents in storage fields and contributions to some of the popular distributed object store like CEPH, MinIO. 

Andy Rudoff, Persistent Memory SW Architect, Intel Corporation

Andy Rudoff is a Senior Principal Engineer at Intel Corporation, focusing on Non-Volatile Memory programming. He was a contributor to the SNIA NVM Programming Technical Work Group. His more than 30 years industry experience includes design and development work in operating systems, file systems, networking, and fault management at companies large and small, including Sun Microsystems and VMware. Andy has taught various Operating Systems classes over the years and is a co-author of the popular UNIX Network Programming text book.


Vaishnavi S G, Software Developer, Advanced Micro Devices, Inc.

Vaishnavi is working as a Software Developer at AMD Inc in Hyderabad. She has around 4 years of work experience working on Storage and Networking solutions. Formerly, she worked at Xilinx Inc. on Computational Storage, NVMe, and RDMA related technologies. As part of computational storage she has offloaded to accelerate data compression, encryption, regular expressions, etc to FPGA and enabled Peer-to-Peer data transfers on various platforms and then created an end-to-end solution at file system layer to offload compute in Linux kernel space. She has also worked on various visualization techniques of Deep Learning as a research intern at Philips Research Bangalore. She received her Bachelor’s Degree in Engineering Science and Electrical Engineering from the Indian Institute of Technology, Hyderabad.

Arthur Sainio, Co-Chair, SNIA Persistent Memory & NVDIMM Special Interest Group/Director of Product Marketing, SMART Modular Technologies

Arthur Sainio is Co-Chair of the SNIA Persistent Memory Special Interest Group, which accelerates the awareness and adoption of Persistent Memories and NVDIMMs for computing architectures. As a Director of Product Marketing at SMART Modular Technologies. Arthur has been driving new product launch and business development activities at SMART since 1998. Prior to Smart, Arthur worked as a product manager at Hitachi Semiconductor America. While there, his focus was on DRAM, SRAM and Flash technologies.  Arthur holds a MBA from San Francisco State University and a MS from Arizona State University.

Mayank Saxena, Sr. Director, Engineering, Samsung

Mayank is a seasoned storage engineering leader & entrepreneur focused on building innovative products at scale. He has 20+ years in technology R&D, software, product development, and team-building experience at companies like NetApp, Microsoft Research, NortekControl, and HP Labs. He successfully co-founded startups in the field of Cloud and IoT data processing. As an inventor, he holds multiple US patents in the area of storage, data security, and distributed networking. He holds an M.S. in Computer Science from USC, Los Angeles.

 Scott Shadley, Co-Chair, SNIA Computational Storage Technical Work Group/VP Marketing, NGD Systems

Scott Shadley is VP Marketing at NGD Systems where he leads marketing, product management, and product development for the company’s industry-leading computational storage. He has been a key figure in promoting computational storage, being co-chair of the SNIA Technical Working Group on the subject which he helped found, and speaking on the subject at Open Compute Summit, Flash Memory Summit, NVMe Developer Days, and many other events, press interviews, blogs, and webinars. Before joining NGD Systems, Scott managed the Product Marketing team at Micron, was the Business Line Manager for the SATA SSD portfolio, and was the Principal Technologist for the SSD and emerging memory portfolio. He launched four successful innovative SSDs for Micron and two for STEC, all of which were multimillion dollar sellers. Scott earned a BSEE in Device Physics from Boise State University and an MBA in marketing from University of Phoenix.

Prasad Venkatachar, Sr. Director of Technical Marketing, Pliops

Prasad Venkatachar is an experienced database and analytics professional with 20 years of combined experience in Product Management/Marketing & Solution Architecture. In these 20 years of progressive experience served several fortune 500 enterprise customers to deliver business value outcomes through multi-database & big Data Solutions on both Cloud & data center environments. Prasad leads solution & tech marketing at Pliops. Before Joining Pliops, he worked at Lenovo, Hewlett Packard Enterprise, SanDisk, and i2 Technologies. He holds several cloud (Azure, AWS & GCP) and Database (Oracle, Microsoft, IBM) certifications.

Andy Walls, Chief Architect, IBM Fellow, IBM Corporation

Andy Walls is Chief Architect and CTO for IBM’s Flash Systems Division. He is also an IBM Fellow, the company’s most prestigious honor. A 35-year storage industry veteran, Andy is a pioneer in enabling flash memory in the enterprise. He has developed enterprise storage systems that achieve high performance, good endurance, and the availability data centers require. He was responsible for the Texas Memory Systems acquisition and has since defined the architecture for all FlashSystem products. He is currently defining next generation products that can be used in traditional SAN environments as well as in clouds and by emerging workloads. He is widely recognized an expert in storage and flash memory. He has designed ASICs, PCBs, firmware stacks, and systems. Known as an innovator, he has filed over 100 patents. Andy earned a BSEE from UC Santa Barbara.

Bernie Wu, VP Strategic Alliances, MemVerge

Bernie is VP Strategic Alliances at MemVerge. He has 25+ years of experience as a senior executive for data center hardware and software infrastructure companies including companies such as Conner/Seagate, Cheyenne Software, Trend Micro, FalconStor, Levyx, and MetalSoft. He is also on the Board of Directors for Cirrus Data Solutions.

Bernie has a BS/MS in Engineering from UC Berkeley and an MBA from UCLA.

Ziye Yang, Staff Software Engineer, Intel Corporation

Ziye Yang is a staff software engineer at Intel and involved in software development work in cloud native area. Before that, Ziye worked at EMC for 4.5 years. Ziye is interested in system virtualization, file system and storage related research and development work. Ziye currently has 15 issued patents in US and 7 issued patents in PRC. Ziye holds a master degree in computer science from Fudan University in 2009.